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    Hardware Verification Engineer Interview

    Anonymous Employee in Fullerton, CA
    No Offer
    Positive Experience
    Easy Interview

    Application

    The process took 1 day. I interviewed at CSU Fullerton (Fullerton, CA) in March 2012.

    Interview

    The interview was long but there were very basic questions regarding skills.

    Interview Questions

    • what is VHDL, Verilog?   1 Answer
    • what is system verilog? What is use of System Verilog? Do you know C, C++? Do you know Unix?   1 Answer
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