Marvell Technology Design Engineer Interview Questions

Updated Jun 21, 2015
82 Interview Reviews

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  1.  

    ASIC Design Engineer Interview

    Anonymous Interview Candidate
    Accepted Offer
    Positive Experience
    Average Interview

    Application

    I applied online – interviewed at Marvell Technology.

    Interview

    Phone interview for very basic digital design question i.e. setup/hold time, max clock frequency, and some project questions. Received onsite interview after 2 weeks, asked very detailed on my verilog project, fsm, fifo, cross domain clock, little perl and OOP.

    Interview Questions

    • never learned perl before so did not answer.   1 Answer
  2.  

    Design Engineer Interview

    Anonymous Employee
    Declined Offer
    Average Interview

    Application

    I applied through college or university. The process took 2+ monthsinterviewed at Marvell Technology.

    Interview

    I applied through school career fair and I got called for an onsite interview in about a month. The questions were average difficulty. It varied slightly by the person who was interviewing.

    Interview Questions

    Reasons for Declining

    I had a better offer from another company

  3.  

    ASIC Design Engineer Interview

    Anonymous Employee in Santa Clara, CA
    No Offer
    Positive Experience
    Average Interview

    Application

    I applied through an employee referral. The process took a weekinterviewed at Marvell Technology (Santa Clara, CA) in December 2014.

    Interview

    phone interview -- just general question because i got refer from my friends onsite interview -- got me email from HR to arrange my interview date and time i had 5 people for interview most of them were nice, but one guy was very annoying. i coudn't understand his question, so i asked again. but he was angry because i asked again. had a lunch with them and talk about general question

    Interview Questions

    • clock divider / mealy vs moor fsm / through my resume project / setup time hold time   Answer Question
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  5.  

    Physical Design Engineer Interview

    Anonymous Interview Candidate in Santa Clara, CA
    Accepted Offer
    Positive Experience
    Easy Interview

    Application

    I applied through an employee referral. The process took a weekinterviewed at Marvell Technology (Santa Clara, CA).

    Interview

    Phone call from HR, tell details about grounp, and On-Site with 7 rounds, each round takes 45 mins, 1:1 style, Very basic question, setup, hold, timing report, Manager took for lunch, and talk about the group, and visit campus. Logic effect calculation, draw stick picture of NAND, sample sequence detector, cross clock domain. Talk about your resume, and explain your project at school. Nothing surprises, pretty basic stuff.

    Interview Questions

    Negotiation

    No negotiation

  6.  

    ASIC Design Engineer Interview

    Anonymous Employee in Santa Clara, CA
    No Offer
    Neutral Experience
    Difficult Interview

    Application

    I applied online. The process took 2 weeksinterviewed at Marvell Technology (Santa Clara, CA) in November 2014.

    Interview

    apply online and after several weeks, I got phone interview. It is about ASIC design/verification. My background is more focus on Verification of microprofessor, FPGA. Not very familiar with ASIC flow.so it is very important for background match.

    Interview Questions

  7.  

    ASIC Design Engineer Interview

    Anonymous Employee in Santa Clara, CA
    No Offer
    Negative Experience
    Average Interview

    Application

    I applied online. The process took 3+ monthsinterviewed at Marvell Technology (Santa Clara, CA) in November 2014.

    Interview

    I received a call for an onsite interview as I was in Santa Clara itself. I gave first onsite with 3 engineers. After 15-20 days I received call for another onsite with 4 engineers. The interviews were pretty basic stuff related to Verilog basics, FSM Design, FIFO related questions as well as on the resume. After 2nd onsite I waited for 2 months but I did not get any reply from HR or recruiter. Finally when I contacted manager, I was told that they had already selected some other candidate. They seriously should learn some professionalism and have the courtesy to give an update to someone who gave 2 onsite interviews. Totally disappointed with the process speed as well communication.

    Interview Questions

    • Verilog tasks and functions, FSM Design, FIFO Depth, some system verilog questions.   Answer Question
  8.  

    Physical Design Engineer Interview

    Anonymous Interview Candidate
    Accepted Offer
    Neutral Experience

    Interview

    the process is typical can nice. started with phone interview, then go in site for interview. There was 4~5 hiring manager interviewing and followed by lunch interview with Director. Finish with VP. The whole process takes 6 hours.

    Interview Questions

    Negotiation

    no negotiation.

  9.  

    No Offer
    Average Interview

    Application

    I applied online. The process took 4+ weeksinterviewed at Marvell Technology.

    Interview

    First a 45-min phone interview and then followed by a 3-hour Skype interview(which was an 'onsite' inverview, still feel not comfortable they were not willing to provide an actual onsite interview)

    Interview Questions

    • How does Cadence Encounter solve setup time violations before CTS   Answer Question
  10.  

    Logic Design Engineer Interview

    Anonymous Interview Candidate
    Accepted Offer
    Positive Experience
    Average Interview

    Application

    I applied online – interviewed at Marvell Technology.

    Interview

    Heard about job openings through a friend that was contacted by a recruiter. E-mailed my resume to the recruiter and was invited for short on-site interviews with two different teams: CPU logic design and SoC verification. I was only brought on-site for the first step because I was living in Santa Clara at the time. After the two interviews, I was later invited back for a full day of on-site interviews with the CPU team. I interviewed with 5 different members of the CPU team. I thought I did really well with the interviews but it still took Marvell weeks to get back to me with an official offer.

    Interview Questions

    • Questions were related to logic design and computer architecture. With a good understanding of pipeline design and out-of-order execution principles the questions were not too hard. The only question that I couldn't really solve was about the design of a scalable, fair arbiter. Expect questions about out-of-order execution algorithms, state machine design, and logic optimization.   Answer Question

    Negotiation

    I was a new college graduate and did not negotiate. I had a competing offer for a higher salary though, so that helped.

  11. Helpful (1)  

    ASIC Design Engineer Interview

    Anonymous Employee in Aliso Viejo, CA
    No Offer
    Neutral Experience
    Average Interview

    Application

    I applied online. The process took 4 weeksinterviewed at Marvell Technology (Aliso Viejo, CA).

    Interview

    I submitted job application 8 months ago online. No HR contacted. Directly contacted by hiring manager and setup one phone call about 45 min, then onsite interview about 6 hours.

    Interview Questions

    • How many data bits needed to represent A*B+C, all are 8 bit unsigned   3 Answers
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