AMD Interview Questions

Updated Oct 13, 2014
Updated Oct 13, 2014
259 Interview Reviews

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Candidate Interview Reviews

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  1.  

    Design Engineer II Interview

    Anonymous Interview Candidate
    Anonymous Interview Candidate
    Interview Details

    Got a phone screen talking about background and projects did at school. The next week went to onsite on Sunnyvale. A nice place.
    Meet with 7 team member in that team. each about an hour. Different member have checked differnet area of ASIC design and verification aspects/
    Overall, a nice experience.

    Interview Questions
    • How to input test signals to test chip after frabrication.   Answer Question
    Accepted Offer
  2.  

    SOC Atchietec Interview

    Anonymous Interview Candidate
    Anonymous Interview Candidate
    Application Details

    I applied online – interviewed at AMD in August 2013.

    Interview Details

    phone interview, asked about C++ programming and concept of computer architecture.
    1. write c code to check prime number
    2. write c code to detect different elements in two array
    3. verilog blocking and non-blocking
    4. different b/w c and verilog
    5. different b/w template and virtual funciton
    6. what is cache, cache coherence
    7. different b/w stack and heap
    8. what is interrupt

    Interview Questions
    No Offer
    Average Interview
  3.  

    Entry Level Hardware Engineer Interview

    Anonymous Interview Candidate in Austin, TX
    Anonymous Interview Candidate in Austin, TX
    Application Details

    I applied online. The process took 6 daysinterviewed at AMD in August 2013.

    Interview Details

    I applied the job via company website and got the chance to be phone interviewed the same day I applied...... I was in a vacation at that time!!!! Anyway, we set up a time and did an hour interview four days later.... The questions covers all the stuffs from hardware to software. They are not difficult individually, however, it requires you know every aspect of the computer. My answers to those questions are ..... not bad, according to the recruiter. But I do fail some of them. Finally, I cannot get the chance to do a onsite interview. I lose a good opportunity!!!!

    Interview Questions
    • The process of changing page when there is a page fault. Very detail!   Answer Question
    No Offer
    Positive Experience
    Average Interview
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  5.  

    Co-Op Engineer Interview

    Anonymous Interview Candidate in Austin, TX
    Anonymous Interview Candidate in Austin, TX
    Application Details

    I applied online. The process took 5 daysinterviewed at AMD in August 2013.

    Interview Details

    Connected through linkedIn and they were exactly looking for my kind of experience in computer architecture and programming. I had a telephonic conversation and a meeting after that with only questions if I was interested in the position. Nothing technical as such just got to know about my skill set.

    Interview Questions
    Accepted Offer
    Easy Interview
  6.  

    Senior Product Development Engineer Interview

    Anonymous Interview Candidate in Austin, TX
    Anonymous Interview Candidate in Austin, TX
    Application Details

    I applied through an employee referral. The process took a dayinterviewed at AMD.

    Interview Details

    Six interviews with Senior, Member of Technical Staff and Manager. Last one day

    Interview Questions
    Negotiation Details
    None
    Accepted Offer
    Positive Experience
  7.  

    Design Engineer II Interview

    Anonymous Interview Candidate in Austin, TX
    Anonymous Interview Candidate in Austin, TX
    Application Details

    I applied online. The process took 1+ weekinterviewed at AMD in June 2013.

    Interview Details

    Very good. Manager is very nice

    Interview Questions
    Accepted Offer
    Average Interview
  8. 8 people found this helpful  

    Graduate Design Engineer/Physical Design Interview

    Anonymous Interview Candidate in Austin, TX
    Anonymous Interview Candidate in Austin, TX
    Application Details

    I applied through an employee referral. The process took 2+ weeksinterviewed at AMD in May 2013.

    Interview Details

    I got the call for telephonic interview through referral. Phone interview was around 45 - 60 min. After the getting through the phone screen, was invited for onsite.

    The onsite was from 9am - 4pm, with 6 1:1 45min sessions and lunch with the manager.

    Interview Questions
    • Phone Screen:
      >Difference b/w latch and flip flop
      >Clock domain crossing; synchronizers, how they are placed wrt floor planning
      >Explain what is IR drop and EM and ways to reduce it
      >Inverter sizing; wrt mobility, drive strengths, matching charge/ discharge delays, rise/ fall times
      >Verilog blocking and non-blocking statements and what do they realise in hw
      >Dynamic power dissipation and ways to reduce it
      >Static power dissipation and ways to reduce it; RBB/ FBB, multiple Vt devices
      >A buffer ckt, wherein the o/p of inv1, voltage is equal to the switching threshold of inv2, now what is the o/p of the buffer; static power dissipation, dc path question
      >Realise AND/OR/NAND logic using 2:1 mux
      >What is setup/ hold time violations; meta-stability issues
      >How to overcome setup/ hold time violations
      > crosstalk and how will you reduce it

      Onsite:
      Round #1:
      >Nmos pull up, Pmos pull down structure with rising step input. Was asked to draw the output pattern and explain the functioning of the circuit and also to predict what it's used as.
      >asked to draw transistor level diag of 2 i/p nand gate and explain how i size it
      >was given a logical path and i had to size the devices using logical effort
      >asked to draw a transistor level diag of flip flop and point out the setup and hold nodes
      >2 i/p dynamic nand gate -> cascade of 2 stages connected directly w/o a domino inv; asked to draw the wave patter at final out
      >contd: now with domino inv; asked how big it should be
      >contd: level restorer; concepts of full keeper, whether it can be used in the given case
      >concepts of clock feed through, charge sharing, back gate coupling

      Round #2:
      >questions from my resume regarding the projects that i have worked on and also some of asic tools related to PD
      >how do you compare two values; what logic you will use
      >timing optimization wrt given logic structure; had to re-arrange the logic blocks and also make use of alternate gates to implement the logic and meet the timing considerations
      >explain crosstalk; what is aggressor and victim, how will you reduce it
      >some questions on clock tree synthesis; was given a scenario with inv's of specific drive strengths and asked to place them accordingly on the given grid
      >given a <63:0> 2 i/p and gate, where will you position the gate in a rectangle block taking into consideration crosstalk; floor planning wrt crosstalk issues
      >asked about async fifo (from resume); corner cases and working

      ROund #3:
      >asked to implement a boolean logic using k-map minimization
      >pseudo code explaining blocking and non-blocking usage, taking example of flip flop
      >cache - write back, write through caches, cache replacement policies, messi protocol, cache organization - direct mapped, set associative
      >specific questions from my resume

      Round #4:
      >setup/ hold time violations
      >given scenario: if receiving flop is delayed wrt launching flop, what timing parameter is violated and how to rectify it
      >contd: if launching flop is delayed wrt receiving flop, again what is affected and how to overcome the issue
      >wrt my resume (PLL design), few questions regarding charge pump design

      Round #5:
      >signal integrity issues - cross talk, IR drop, EM with specific scenarios and ways to reduce
      >2 i/p nor gate with sizing and its layout; multi fingering
      >ways to reduce interconnect delay
        Answer Question
    No Offer
    Positive Experience
    Difficult Interview
  9.  

    Product Development Engineer I Interview

    Anonymous Interview Candidate
    Anonymous Interview Candidate
    Application Details

    I applied online – interviewed at AMD.

    Interview Details

    A day of 30 minute interviews with several engineers at the company

    Interview Questions
    Negotiation Details
    Sign on bonus was negotiated, but they do not budge on starting salary...
    Accepted Offer
    Positive Experience
    Difficult Interview
  10.  

    Desktop Support Technician Interview

    Anonymous Interview Candidate in Austin, TX
    Anonymous Interview Candidate in Austin, TX
    Application Details

    I applied through a recruiter – interviewed at AMD in May 2013.

    Interview Details

    Had 3 Interviews.Done with in person interview session and the session was really good. It was a panel of 5 Peoples in a room and were really nice. Every single person asked me related questions to the position. Waiting for their response.

    Interview Questions
    • I didnt find any difficult or unexpected questions. There was may be one questions which i think answered wrong but i tried my best to answer it.   Answer Question
    No Offer
    Positive Experience
    Easy Interview
  11.  

    Talent Acquisition Manager Interview

    Anonymous Interview Candidate in Austin, TX
    Anonymous Interview Candidate in Austin, TX
    Application Details

    I applied online. The process took 6 weeksinterviewed at AMD.

    Interview Details

    Two phone interviews, one with the recruiter and another with the hiring manager. I then went through a full day of interviews. They were just in the process of starting a new way of interviewing where each interviewer had a different value they were asked to probe. It was a behavioral interview format. The main concern about the process was that there wasn't clarity, and in some cases, disagreement on what they really needed in the position.

    Interview Questions
    No Offer
    Neutral Experience
    Average Interview

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