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Ambarella Interview Questions & Reviews

Updated Mar 6, 2014
All Interviews Received Offers

Getting an Interview  

51%
15%

Interview Experience  

38%
53%
7%

Interview Difficulty  

Average Difficulty
21 candidate interviews
Relevance Date Difficulty
1 person found this helpful

Declined Offer

Positive Experience

Average Interview

ASIC Verification Intern Interview

ASIC Verification Intern
Santa Clara, CA

I applied online and the process took 3 weeks - interviewed at Ambarella in January 2014.

Interview Details – I applied online. Received an interview call 2 weeks later.
I was informed that the position requires knowledge of computer architecture, digital design and C/C++. I was asked 1 question in each topic. 1 question on cache associativity, 1 question to design a circuit which outputs a pulse when an input flips, 1 question each on virtual functions and recursive functions (Factorial series).
I was informed there would be a follow-up interview, but I was given the offer without the second interview.

Interview Question – Design a circuit which outputs a pulse when the input flips. The input is synchronous to a clock.   View Answer

Reason for Declining – Received a better offer elsewhere.


No Offer

Neutral Experience

Intern Verification Engineer Interview

Intern Verification Engineer

I applied online and interviewed at Ambarella.

Interview Details – Email my resume online and got an phone interview after several weeks

Interview Question – C++ questions   Answer Question


No Offer

Neutral Experience

Average Interview

Verification Engineer Interview

Verification Engineer

I applied online and interviewed at Ambarella.

Interview Details – I applied online. It took me a week to get a phone interview. The position is Verification engineer. The interview lasted for half an hour. Nothing tricky, general circuit design and c language questions. Asked me to design a circuit giving the number and names of the inputs and outputs and the function to implement. Asked me to write a recursive function in c language.

Interview Question – Design a circuit to generate a pulse whenever the input flips.   Answer Question


1 person found this helpful

No Offer

Positive Experience

Difficult Interview

Digital Design Internship Interview

Digital Design Internship

I applied through college or university and the process took 3 weeks - interviewed at Ambarella.

Interview Details – 3 phone interviews

Interview Question – State machine, testbench   Answer Question


1 person found this helpful

No Offer

Positive Experience

Average Interview

Entry Level ASIC Design Engineer Interview

Entry Level ASIC Design Engineer
Santa Clara, CA

I applied online - interviewed at Ambarella in September 2013.

Interview Details – two round short onsite.
Second round is simple, all common ASIC interview questions.
First round mainly about asynchronize fifo and a tricky latch decoder question.
Failed in the first one but still got the second chance, got rejected after the second one although didn't make any mistake.

Interview Question – asynchronize fifo coding   Answer Question


No Offer

Positive Experience

Average Interview

Summer Intern-Summer Intern Interview

Summer Intern-Summer Intern
Santa Clara, CA

I applied through college or university and the process took 4+ weeks - interviewed at Ambarella in February 2013.

Interview Details – Submitted resume at the career fair, and then get e-mails to have phone interview. Three rounds of phone interviews.

Interview Question – 1. Basic circuit design and logic design question
2. Basic verilog question (e.g. verilog module to swap 2 variables, 4-to-1 mux etc.)
3. Write a verilog testbench module which generates 2 output signals:
    1) clock - at 1GHZ
    2) reset - asserted (1) for first 100 cycles and then deasserted (0)
4. 8 entry FIFO module
5. What are the 2 components of a chip power and how will you reduce each one?
  Answer Question


No Offer

Neutral Experience

Average Interview

ASIC Design Engineer Intern Interview

ASIC Design Engineer Intern

I applied through college or university and the process took 5 weeks - interviewed at Ambarella.

Interview Details – Submit resume during the career fair, and then get e-mails to have interview. Three rounds of phone interviews

Interview Question – Detect the leading one in a sequence.
Find the second smallest number in an array.
Determine whether a infinite sequence is the multiple of 5.
  Answer Question


No Offer

Neutral Experience

Average Interview

Summer Intern Interview

Summer Intern

I applied through college or university and the process took 3 weeks - interviewed at Ambarella.

Interview Details – On campus career fair submitted resume, phone interview. Totally technical, questions on clock skew/jitter, string detector, verilog data width and implementing gate with MUX

Interview Question – Compare the advantage of shift register and FSM in implementing string detector   Answer Question


No Offer

Neutral Experience

Average Interview

VLSI Design Interview

VLSI Design

I applied through college or university and the process took 5 days - interviewed at Ambarella in February 2013.

Interview Details – Summit my application through career fair. 45mins Phone Interview. The interviewer talked about the company and asked my questions for 10mins. Question on FSM design of sequencial detector, such as 100011, and Verilog coding. How to find the second largest number in an array in C. Asked question on my project.

Interview Question – C language programmng   Answer Question


No Offer

Neutral Experience

Analog Design Engineer Interview

Analog Design Engineer
Santa Clara, CA

I applied online and the process took 2 days - interviewed at Ambarella.

Interview Details – The Interviewer just asked about the project in your resume:
the company need someone who can use verilog, and understand the layout of your design.
No hiring entry-level engineer

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