Getting an Interview
Getting an Interview
Interviews for Top Jobs at Cadence Design Systems
- Software Engineer (12)
- Member of Technical Staff (9)
- Senior Member of Technical Staff (7)
- Intern (7)
- Lead Applications Engineer (5)
- Design Engineer (5)
- Senior Applications Engineer (4)
- Applications Engineer (3)
- Application Engineer (3)
- Principal Applications Engineer (3)
- Engineering (3)
- Product Engineer (3)
- Product Validation Engineer (2)
- Analog Design Engineer (2)
- Senior Member of Consulting Staff (2)
- Human Resources (2)
- Senior Manager (2)
- Senior Software Engineer (2)
- Software Developer (2)
- Software Engineering Intern (1)
- Smts (1)
- Staff Engineer (1)
- Engneering (1)
- R&D Engineer (1)
- Senior Software Engineering Manager (1)
- Hardware Engineer (1)
- IC Design (1)
- Senior Design Engineer (1)
- Senior Embedded Software Engineer (1)
- Senior Engineer (1)
Applications Engineer Interview
I applied online. The process took 2 days. I interviewed at Cadence Design Systems (San Jose, CA).
short phone interview with simple questions on resume like how much do you know about PERL, verilog etc. confirmed for onsite interview immediately onsite : 3 rounds 1st 45 min didn't involve any questions, just discussion about position 2nd 1 hr heavily on PERL and my experience in scripting 3rd 1.5 hrs on verilog, FSM, basic SystemVerilog and discussion about position 2nd and 3rd round were mostly coding on white board. The hiring manager was really nice. Although I could not get an offer, he was extremely helpful and offered me feedback about my interview and we are still in touch.
- draw FSM for 4 bit counter with load, reset write verilog code for it perl regex questions Answer Question
Other Interview Reviews for Cadence Design Systems
Applications Engineer InterviewNo OfferPositive ExperienceDifficult Interview
I applied through a recruiter. I interviewed at Cadence Design Systems.
Initial 2 hour phone interview when the manager was convinced and short listed me for an on-site. The on site interview was for 7 rounds one hour each. Was interviewed by the entire team one by one. Had to use a white board to sketch and explain concepts. Mostly revolved around my projects and also certain fundamental concepts were tested.
- Covered entire Digital VLSI and RTL2GDSII flow, pseudo-codes, Power optimization, Physical Design, Timing Analysis, Perl, antenna effect. Answer Question
Applications Engineer InterviewDeclined Offer
I applied through an employee referral. The process took a week. I interviewed at Cadence Design Systems.
I first had a phone interview where they asked me my background, my previous job experience and some projects I was envolved in. Later i had an onsite interview where 4 interviewers asked me more detailed technical questions.
- Why do you want to leave your current job? Answer Question
Application Engineer InterviewNo OfferPositive ExperienceDifficult Interview
The process took 4+ weeks. I interviewed at Cadence Design Systems (San Jose, CA) in June 2010.
A short Phone Interview with manager, followed by on site interview. The people at cadence are very nice and professional. It was a nice experience.
Application Engineer InterviewNo OfferPositive ExperienceEasy Interview
The process took 1 day. I interviewed at Cadence Design Systems (Santa Clara, CA) in September 2009.
We had talked about my resume, and the work I had done previously with my former company. The interviewer went into details of the Cadence tool for which the AE would be responsible for if he were to get the job. In the end, they found other interviewees with more experience with that particular Cadence Tool.
- Describe some of the common errors you come across while using the cadence tool 1 Answer
Application Engineer InterviewNo OfferNegative ExperienceAverage Interview
I applied online. The process took 1 day. I interviewed at Cadence Design Systems in February 2011.
Unscheduled telephone call: I was not expecting the call and was in the middle of another project. The interview started by asking a technical question about systemverilog - write code in your head - image the design. ---- I refuse to recite coding standards. Actually, I refer to book and the internet if I cannot remember a systemverilog rule - duh!
- Design an OVM interface for --- using systemverilog? 1 Answer
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