Marvell Technology ASIC Design Engineer Interview Questions

Updated Apr 2, 2015
33 Interview Reviews

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ASIC Design Engineer Interview

Anonymous Interview Candidate
Accepted Offer
Positive Experience
Average Interview

Application

I applied online – interviewed at Marvell Technology.

Interview

Phone interview for very basic digital design question i.e. setup/hold time, max clock frequency, and some project questions. Received onsite interview after 2 weeks, asked very detailed on my verilog project, fsm, fifo, cross domain clock, little perl and OOP.

Interview Questions

  • never learned perl before so did not answer.   1 Answer

Other Interview Reviews for Marvell Technology

  1.  

    ASIC Design Engineer Interview

    Anonymous Employee in Santa Clara, CA
    No Offer
    Positive Experience
    Average Interview

    Application

    I applied through an employee referral. The process took a weekinterviewed at Marvell Technology (Santa Clara, CA) in December 2014.

    Interview

    phone interview -- just general question because i got refer from my friends
    onsite interview -- got me email from HR to arrange my interview date and time
    i had 5 people for interview
    most of them were nice, but one guy was very annoying. i coudn't understand his question, so i asked again. but he was angry because i asked again.
    had a lunch with them and talk about general question

    Interview Questions

    • clock divider / mealy vs moor fsm / through my resume project / setup time hold time   Answer Question
  2.  

    ASIC Design Engineer Interview

    Anonymous Employee in Santa Clara, CA
    No Offer
    Neutral Experience
    Difficult Interview

    Application

    I applied online. The process took 2 weeksinterviewed at Marvell Technology (Santa Clara, CA) in November 2014.

    Interview

    apply online and after several weeks, I got phone interview. It is about ASIC design/verification. My background is more focus on Verification of microprofessor, FPGA. Not very familiar with ASIC flow.so it is very important for background match.

    Interview Questions

  3.  

    ASIC Design Engineer Interview

    Anonymous Employee in Santa Clara, CA
    No Offer
    Negative Experience
    Average Interview

    Application

    I applied online. The process took 3+ monthsinterviewed at Marvell Technology (Santa Clara, CA) in November 2014.

    Interview

    I received a call for an onsite interview as I was in Santa Clara itself. I gave first onsite with 3 engineers. After 15-20 days I received call for another onsite with 4 engineers. The interviews were pretty basic stuff related to Verilog basics, FSM Design, FIFO related questions as well as on the resume. After 2nd onsite I waited for 2 months but I did not get any reply from HR or recruiter. Finally when I contacted manager, I was told that they had already selected some other candidate. They seriously should learn some professionalism and have the courtesy to give an update to someone who gave 2 onsite interviews. Totally disappointed with the process speed as well communication.

    Interview Questions

    • Verilog tasks and functions, FSM Design, FIFO Depth, some system verilog questions.   Answer Question
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  5.  

    ASIC Design Engineer Interview

    Anonymous Employee
    No Offer
    Average Interview

    Application

    I applied online. The process took 4+ weeksinterviewed at Marvell Technology.

    Interview

    First a 45-min phone interview and then followed by a 3-hour Skype interview(which was an 'onsite' inverview, still feel not comfortable they were not willing to provide an actual onsite interview)

    Interview Questions

    • How does Cadence Encounter solve setup time violations before CTS   Answer Question
  6. Helpful (1)  

    ASIC Design Engineer Interview

    Anonymous Employee in Aliso Viejo, CA
    No Offer
    Neutral Experience
    Average Interview

    Application

    I applied online. The process took 4 weeksinterviewed at Marvell Technology (Aliso Viejo, CA).

    Interview

    I submitted job application 8 months ago online. No HR contacted. Directly contacted by hiring manager and setup one phone call about 45 min, then onsite interview about 6 hours.

    Interview Questions

    • How many data bits needed to represent A*B+C, all are 8 bit unsigned   3 Answers
  7. Helpful (1)  

    ASIC Design Engineer Interview

    Anonymous Interview Candidate
    Accepted Offer

    Interview

    4 rounds, one hr and three technical. Generally good. They asked questions about the resume, one interviewer asked a lot of basic circuit problem, like how to draw an inverter(transistor level), state machine, etc.

    Interview Questions

    • Most of the questions are just normal, like state machine, timing, clock gating.   Answer Question
  8. Helpful (2)  

    ASIC Design Engineer Interview

    Anonymous Employee
    No Offer
    Difficult Interview

    Application

    I applied online – interviewed at Marvell Technology in April 2014.

    Interview

    I've applied online at Jan. and wait 2-3 months to get this phone interview. One guy from Marvell emailed me and set a time to call (so I choose the next day's afternoon). And that guy called on time. The whole time of this phone interview is about 50min, and he asked about 8 questions.

    Interview Questions

    • How to check if a fabricated chip has a hold time violation, and how to fix it.   2 Answers
  9. Helpful (3)  

    ASIC Design Engineer Interview

    Anonymous Employee in Santa Clara, CA
    No Offer
    Neutral Experience
    Average Interview

    Application

    I applied through a recruiter. The process took 2+ weeksinterviewed at Marvell Technology (Santa Clara, CA) in March 2014.

    Interview

    one phone interview, asked about projects on the resume. Then asked about MESI protocol. Then Onsite interview. There are 5 people. First one asked basic CPU questions, such as 5 stage pipelined CPU. Second one asked me about reorder buffer in the out of order processor and load store queue. Third one asked about waveform questions. The last two asked me about some verilog questions.

    Interview Questions

  10. Helpful (1)  

    ASIC Design Engineer Interview

    Anonymous Employee
    No Offer

    Application

    The process took 1 dayinterviewed at Marvell Technology.

    Interview

    I was offered 2 phone interview. And then have an onsite interview. They pay for the flight and hotel. Their interviews are quite difficult. In the 1st phone, they asked to describe MESI's all transition on phone. And most question is on CPU design. They asked a lot of implementation details.

    Interview Questions

    • They asked a lot questions on pipeline design. Like how to optimize the overall ipc regarding branch? Is it possible to get branch resolved in decode stage?   Answer Question

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