Marvell Technology
3.0 of 5 350 reviews
www.marvell.com Santa Clara, CA 5000+ Employees

Marvell Technology ASIC Verification Engineer Interview Questions & Reviews

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Getting the Interview 

75%
25%

Interview Experience 

66%
33%
0%

Interview Difficulty 

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3 candidate interviews Back to all interview questions
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Accepted Offer

Positive Experience

Average Interview

ASIC Verification Engineer Interview

ASIC Verification Engineer
Santa Clara, CA

I applied online and the process took 4+ weeks - interviewed at Marvell Technology in December 2013.

Interview Details – The entire process took about a month. Two phone interviews followed by an onsite interview. Environment was very friendly. Basics of Comp. Arch., Perl, Verilog and OOPs asked.

Interview Question – Virtual memory management   Answer Question

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No Offer

Positive Experience

Easy Interview

ASIC Verification Engineer Interview

ASIC Verification Engineer
Santa Clara, CA

I applied online and the process took 1 week - interviewed at Marvell Technology in October 2012.

Interview Details – Contacted by hiring manager and got arranged a phone interview a week later. First self-introduce. Then got asked four technical questions. Clock frequency divider, digital circuit design- given 4 inputs, outputs and timing diagram to design gate level circuits, Verilog question about signed and unsigned integer... The interviewer was very nice and asked me about my interest.

Interview Question – Black box CRC circuit checking...   Answer Question

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No Offer

Neutral Experience

Average Interview

ASIC Verification Engineer Interview

ASIC Verification Engineer
San Jose, CA

I applied through a recruiter and the process took a day - interviewed at Marvell Technology in July 2010.

Interview Details – phone screen followed by in person interview.
The interview was easy but I was not a match

Interview Questions

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