Marvell Technology

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Marvell Technology Design Verification Engineer Interview Questions

8 Interview Reviews

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Design Verification Engineer Interview

Anonymous Interview Candidate
Anonymous Interview Candidate
Interview Details

I applied online. They gave me two phone interviews of two positions. The first one is logic design position, the questions are all about computer architecture: branch predictor, forward, pipeline, what is cache, cache coherence, etc. For the first interview, I was asked about more than 15 questions. Lucky, I spent 3 hours reading the CA book before interview. For the design verification interview, I haven't prepared at all since I didn't know that it was a verification position, all the questions about programing were not answered well. It has been three weeks since the interview, I received no responses.

Interview Questions
  • For the design verification interview, I haven't prepared at all since I didn't know that it was a verification position, all the questions about programing were not answered well.   Answer Question
No Offer

Other Interview Reviews for Marvell Technology

  1.  

    Design Verification Engineer Interview

    Anonymous Interview Candidate in Santa Clara, CA
    Anonymous Interview Candidate in Santa Clara, CA
    Application Details

    I applied through an employee referral. The process took a weekinterviewed at Marvell Technology in July 2013.

    Interview Details

    Referred by the employee in the group. It takes only 1 week to proceed. Most people are nice. The interview takes 8 hours including 1 hour for lunch. You must be prepared.

    Interview Questions
    No Offer
    Positive Experience
    Average Interview
  2.  

    Design Verification Engineer Interview

    Anonymous Interview Candidate
    Anonymous Interview Candidate
    Application Details

    I applied online – interviewed at Marvell Technology.

    Interview Details

    1 telephonic interview followed by 2 on site interviews.

    Interview Questions
    Negotiation Details
    No negotiation
    Accepted Offer
  3.  

    Design Verification Engineer Interview

    Anonymous Interview Candidate in Santa Clara, CA
    Anonymous Interview Candidate in Santa Clara, CA
    Application Details

    I applied online. The process took 2+ weeksinterviewed at Marvell Technology.

    Interview Details

    Phone interview.

    Interview Questions
    • 1 is heavier than the other 5 marbles among 6 mables . given a weight to find the heavier one.   View Answers (2)
    No Offer
    Average Interview
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  5. 2 people found this helpful  

    Design Verification Engineer Interview

    Anonymous Interview Candidate in Santa Clara, CA
    Anonymous Interview Candidate in Santa Clara, CA
    Application Details

    I applied online. The process took a dayinterviewed at Marvell Technology in August 2011.

    Interview Details

    Initial phone screen (2) by hiring manager + junior employee (<3 years out of college).
    Manager asks conceptual and higher level questions. Junior employee asks coding questions (dictates a piece of code and asks questions on that (SystemVerilog)
    Have to fill out online profile and NDA before going onsite.
    Onsite interview start with meeting HR person who collects compensation information and asks questions like why you left each of your previous employers, why you are applying now, what other companies you are talking to, what factors you will use to decide the offer etc. Later met with hiring manager (heads design+verif), 1 design engineer and 2 verif engineers (junior+senior).
    Hiring Manager asks high level questions: e.g where will you place coverage collection for stimulus applied to DUT (monitor Vs driver)
    Junior verif person asks more coding questions and Behavioural interview (how to deal w/ diffcult person, failures in past etc)
    Design engineer asks some Verilog question and how to test a particular design.
    I give all of them an A for the interview.
    Other Sr Verif engineer was extremely challenged even to speak couple of sentences in English. He just thrust a piece of paper in front of me typed with a couple of questions. They had non standard terminology and despite repeated requests to explain the terms refused to do so. He kept repeating "just read the question and answer it". After some time I figured out what was the question and gave the answer. He claimed the answer was wrong and asked me to try again. After I came back I googled and found that my answer was correct. He could have moved on to additional questions and had a better/larger sample to make a decision, but stuck with the 2 questions throughout the 45 minute interview. This person should have been trained and lacked basic communication/interview skills in English.

    Be prepared for coding questions (some code w/ bug in it etc) regardless of how experienced you are.

    Interview Questions
    No Offer
    Neutral Experience
    Average Interview
  6. 1 person found this helpful  

    Design Verification Engineer Interview

    Anonymous Interview Candidate in Santa Clara, CA
    Anonymous Interview Candidate in Santa Clara, CA
    Application Details

    I applied online. The process took a dayinterviewed at Marvell Technology in March 2011.

    Interview Details

    There were total 5 ppl included the HR. And it took about 5 more hours. Each interviewer took about an hour to talked with me, and all the questions are technical based. Some of them from my project experience and some of them are design aspect and some of them are from verification field.

    Interview Questions
    • Describe your task and what you achieved in your project?   View Answer
    • how to balance the pipeline stage to achieve any specific time period?   View Answer
    No Offer
    Neutral Experience
    Average Interview
  7. 1 person found this helpful  

    Design Verification Engineer Interview

    Anonymous Interview Candidate in San Jose, CA
    Anonymous Interview Candidate in San Jose, CA
    Application Details

    I applied online. The process took a dayinterviewed at Marvell Technology in January 2010.

    Interview Details

    The position was for a mixed signal design verification engineer. It was a pretty tough interview. They asked everything from software to hardware possible in the resume. Methodologies for verification, software concepts related to simulator design. Data structures. Analog concepts from DACs to PLL's and verilog-A concepts....

    Interview Questions
    • Transfer function of a simple VCO   View Answer
    • question on packet transfer inside of test bench from generator to driver... (system verilog concepts)   Answer Question
    No Offer
    Neutral Experience
    Difficult Interview
  8.  

    Design Verification Engineer Interview

    Anonymous Interview Candidate
    Anonymous Interview Candidate
    Application Details

    I applied online. The process took 2 weeksinterviewed at Marvell Technology.

    Interview Details

    phone interview

    Interview Questions
    • TDM (time division multiplexing) working and its corner cases .. FIFO questions   Answer Question
    No Offer

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