View All num of num See all Photos Qualcomm This employer has taken extra steps to respond to reviews and provide job seekers with accurate company information, photos, and reviews. Interested for your company?Learn More. www.qualcomm.com Employer Engaged Overview Reviews Salaries Interviews Jobs Photos Benefits 1.9k Reviews 12k Salaries 1.1k Interviews Follow Add Review or Salary Follow Add Review or Salary Interview Question CPU Design Verification Engineer Interview Raleigh, NC Qualcomm Pipelining Hazards? Tags: See more , See less 8 Answer Add Tags Answer Interview Answer 1 Answer ▲ 0 ▼ Hazards are problems with the instruction pipeline in CPU micro-architectures, when the next instruction cannot execute in the following clock cycle and can potentially lead to incorrect computation results. There are typically three types of hazardsdata hazardsstructural hazardscontrol hazards (branching hazards) There are several methods used to deal with hazards, including pipeline stalls/pipeline bubbling, operand forwarding, and in the case of out-of-order execution, the scoreboarding method and the Tomasulo algorithm.Source:Wiki Navin Senguttuvan on Feb 19, 2015 Add Answers or Comments To comment on this, Sign In or Sign Up.