ASIC Verification Engineer Interview Questions

(Posted anonymously by job candidates)

15 Companies: 13 of 15

NVIDIA Interviews

5 ASIC Verification Engineer Interview Questions and Reviews

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Marvell Technology Interviews

3 ASIC Verification Engineer Interview Questions and Reviews

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Qualcomm Interviews

2 ASIC Verification Engineer Interview Questions and Reviews

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19 Interview Questions: 110 of 19

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Jun 20, 2014

Interview Question for Senior ASIC Design Verification Engineer at AMD:

“(Unexpected) What the types of caches?”


Mar 25, 2014

Interview Question for ASIC Verification Engineer at Ericsson-Worldwide:

“Nothing unexpected asked all project related questions.Questions on FSMs,Aorundrobin algorithems.UVM,system verilog,Linkedlists.Register aliasing CPU i/f verification. It is exhaustive be preapre to…”


Feb 19, 2014

Interview Question for ASIC/FPGA Verification Engineer at FirstPass Engineering:

“FPGA designers that use Verilog are typically not good at using object oriented languages like System Verilog.”


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Dec 13, 2013

Interview Question for ASIC Verification Engineer at Marvell Technology:

“Virtual memory management”


Jul 9, 2013

Interview Question for ASIC Verification Engineer at Qualcomm:

“Logic question to verify the design How would you verify 3 blocks with incorrect label ? suppose one with apple 2 with orange 3 with apple & orange.”


Mar 13, 2013

Interview Question for ASIC Verification Engineer NGC at NVIDIA:

“1st is HR, ask about why Nvidia? expected salary, immigration status, graduation date, etc.

2nd ask about verification methodology (UVM, OVM), system verilog (passing obj as function argument…”


Dec 14, 2012

Interview Question for ASIC Verification Engineer at Marvell Technology:

“Black box CRC circuit checking...”


Sep 13, 2012

Interview Question for Senior ASIC Verification Engineer at NVIDIA:

“Design an arbiter. This was detailed and went on for the whole 45+ mins.”


Jul 17, 2011

Interview Question for ASIC Verification Engineer at Qualcomm:

“Node insertion in linked list. Fibonacci series function, hardware to generate Fibonacci series, prime number generation hardware , STA concepts, clock domain crossing, use of synchronizes, skew and…”


Jul 17, 2011

Interview Question for ASIC Verification Engineer at Qualcomm:

“Explain past work experience and Project details.”