Design Verification Engineer Interview Questions

“He asked me about Data hazards, Instruction sets , Examples of branch prediction , 32 bit adder design. WAR and RAW Instruction examples. Basic Computer architecture questions.”

“Nothing special, asked about the work I had done so far.”

“design a FSM based on a given bus protocol”

“It gets very technical ranging from Electrical fundamentals to RF fundamentals and then they start to dig deep on each aspect. Know your chip caps really well! I was asked questions on smith charts…”

“When in your previous work did you wish you behaved differently?”

“1 is heavier than the other 5 marbles among 6 mables . given a weight to find the heavier one.”

“What do each of the bits represent in a memory address having a two-way associative cache with size: X words, Y lines, etc.”

“Do you know anything about RISC Architecture?”

“Pipelining Hazards?”