Design Verification Engineer Interview Questions

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“Pipelining Hazards?”

“He asked me about Data hazards, Instruction sets , Examples of branch prediction , 32 bit adder design. WAR and RAW Instruction examples. Basic Computer architecture questions.”

“design a FSM based on a given bus protocol”

“(Unexpected) What the types of caches?”

“It gets very technical ranging from Electrical fundamentals to RF fundamentals and then they start to dig deep on each aspect. Know your chip caps really well! I was asked questions on smith charts…”

“questions on overriding, overloading.”

“design an electrical circuit with switches, voltage source for a particular application- wasn't expecting one since my area of expertise is mostly digital”

“What do each of the bits represent in a memory address having a two-way associative cache with size: X words, Y lines, etc.”

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