View All num of num See all Photos Qualcomm www.qualcomm.com Engaged Employer Overview Reviews Salaries Interviews Jobs Photos Benefits 2.0k Reviews 12k Salaries 1.1k Interviews Follow Add Review or Salary Follow Add Review or Salary Interview Question ASIC Design Engineer Interview San Diego, CA Qualcomm what 's the steps of synthesis? Tags: See more , See less 8 Answer Add Tags Answer Interview Answer 1 Answer ▲ 0 ▼ The process of mapping the HDL code to cells using technological libraries according to the specified design constraints is known as synthesis.1. The desired HDL code, the technological libraries and the environmental constrains are send to the synthesis tool and then it does further optimization accordingly2.Translates the passed HDL to Boolean Logic3. Maps the Boolean logic into hiearchial blocks and the blocks to equivalent cells4.Optimizations are generally power, area and performance trade offs. It also does timing optimizations like adding buffers to clear off hold time violations and uses different cells of the same functionality to meet the set up-hold requirements. Swetha on Sep 10, 2013 Interviews > ASIC Design Engineer > Qualcomm Add Answers or Comments To comment on this, Sign In or Sign Up.