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79 Staff ASIC Design Engineer Jobs in Milpitas, CA + Post a Job

Engineer, Senior Staff ASIC Design

Marvell Semiconductor 100+ Reviews Santa Clara, CA

Monster

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Engineer, Senior Staff ASIC Design

A Technology company Santa Clara, CA

MSEE with 5+ years of experience/PhD with working knowledge in following areas preferred: - Good understanding of DSP and communication building… Ivy Exec

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Staff ASIC Design Engineer

Broadcom 100+ Reviews Santa Clara, CA

The Processor Division of Broadcom Corporation is well known in the semiconductor industry for providing super high-performance multi-core network… Glassdoor

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Staff ASIC design engineer

LSI 100+ Reviews San Jose, CA

Read Channel IC design team. Responsible for front end block architecture / RTL coding and back end design activities including STA and constraint generation.… Glassdoor

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Sr. Staff ASIC Engineer / Design Lead For Low Latency Design

A Technology company Sunnyvale, CA

Develop the architecture and micro-architecture for the next generation ASICs with special emphasis on low latency Set Methodology for Low Latency… Ivy Exec

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Staff ASIC Physical Design Engineer

Brocade 100+ Reviews San Jose, CA

None Professional Brocade is an industry leader in data center networking solutions and services that enable organizations to manage their most vital… Glassdoor

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ASIC Customer Design Engineer Staff

LSI 100+ Reviews San Jose, CA

- Presales Support (die size support, memory generation, address customer questions and concerns.) - RTL Analysis & Synthesis - Physical Design… Glassdoor

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Engineer, Staff ASIC Design

marvell 100+ Reviews Santa Clara, CA

and accountabilities: 1. Verilog RTL design, development, synthesis and debug. 2. Knowledge of logic design concepts and building blocks and… Glassdoor

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Senior Staff Engineer, SSD ASIC Design

Beyondsoft 5 Reviews San Jose, CA

• Work with different groups of senior engineers (firmware and hardware) for high level architecture definition • Perform RTL-level design… Glassdoor

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Staff Systems Engineer, IP

Tabula 6 Reviews Santa Clara, CA

Staff Systems Engineer, IP The successful candidate… Will develop high performance IP designs beyond the capabilities of FPGAs Will author both… Dice

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Sr. Staff ASIC Engineer / Design Lead For Low Latency Design

A Technology company Sunnyvale, CA

Develop the architecture and micro-architecture for the next generation ASICs with special emphasis on low latency Set Methodology for Low Latency… Ivy Exec

  • Overview
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Updated May 21, 2013