Salary: Senior ASIC Design Verification Engineer in San Jose, CA | Glassdoor

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Senior ASIC Design Verification Engineer Salaries in San Jose, CA

About This Data
162 SalariesUpdated Sep 6, 2016
Average Base Pay
$109,682/yr
1% below national average
Not enough reports to show salary distribution
$99K
Low
$110K
Average
$128K
High

Additional Cash Compensation

Average$5,446
Range$16 - $10,761
How much does a Senior ASIC Design Verification Engineer make in San Jose, CA?

The average salary for a Senior ASIC Design Verification Engineer is $109,682 in San Jose, CA. Salaries estimates are based on 162 salaries submitted anonymously to Glassdoor by Senior ASIC Design Verification Engineer employees in San Jose, CA.

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Salaries by Company

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    Average Base Salaries in (USD)
    Company
    Average Base Salaries in (USD)
    Low
    High
    Apple
    $121,589/yr
    Range: $117K - $128K
    1 employee salary or estimate
    About
    $117K - $128K
    $117K$128K
    Broadcom
    $115,346/yr
    Range: $111K - $120K
    1 employee salary or estimate
    About
    $111K - $120K
    $111K$120K
    NXP Semiconductors
    $115,379/yr
    Range: $111K - $119K
    1 employee salary or estimate
    About
    $111K - $119K
    $111K$119K
    SmartPlay
    $105,848/yr
    Range: $101K - $110K
    1 employee salary or estimate
    About
    $101K - $110K
    $101K$110K
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