Qualcomm Interview Question: => What does this mean in Ver... | Glassdoor

Interview Question

Hardware Engineer Interview San Diego, CA

=> What does this mean in Verilog?

Answer

Interview Answer

2 Answers

0

assignment operator i.e int i => '0'

Anonymous on Apr 15, 2019
0

assignment operator i.e int i=>'0'

Anonymous on Apr 15, 2019

Add Answers or Comments

To comment on this, Sign In or Sign Up.