AMD Design Verification Engineer Interview Questions | Glassdoor

AMD Design Verification Engineer Interview Questions

Updated Jul 20, 2017
9 Interview Reviews

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  1.  

    Verification Design Engineer Interview

    Anonymous Interview Candidate in San Francisco, CA
    No Offer
    Positive Experience
    Average Interview

    Application

    I applied online. I interviewed at AMD (San Francisco, CA) in April 2017.

    Interview

    Applied Online and about 2 months later got an email from a hiring manager to set time and date for a phone interview. Was interviewed by two people on the phone where they asked technical questions as well as questions regarding the projects listed on my resume.

    Interview Questions

    • -Questions about cache coherency
      -Basic Verilog Questions
      -Questions about c++ and traversing trees   Answer Question

  2.  

    Senior ASIC Design Verification Engineer Interview

    Anonymous Interview Candidate in Boxborough, MA
    No Offer
    Neutral Experience
    Easy Interview

    Application

    I applied online. I interviewed at AMD (Boxborough, MA) in May 2014.

    Interview

    I was contacted by email that asked me to schedule a phone interview. I also received a call form the recruiter regarding interview scheduling. I was told that the interview would be mainly a general one and nothing technical would be asked. Some of the questions asked in the interview-
    - Why do you think you are most suitable for this job?
    - How are your skills relevant to this position?
    The questions were easy and mostly of HR type. Never heard back from the company regarding their decision.

    Interview Questions

    • (Unexpected) What the types of caches?   3 Answers
  3.  

    Design Verification Engineer Interview

    Anonymous Interview Candidate in Sunnyvale, CA
    No Offer
    Positive Experience
    Average Interview

    Application

    The process took a week. I interviewed at AMD (Sunnyvale, CA) in April 2012.

    Interview

    Phone interview was pretty basic questions about comp arch, object oriented concepts.
    Onsite interview consisted of 6 rounds technical + 1 HR interview. Questions were mainly comp arch, cache coherency, pipelining techniques. A few questions on verilog, system verilog, perl, assembly language.

    Interview Questions

    • How would you verify a write-back 4-way set associative cache using assembly language programming.   1 Answer

  4. Helpful (2)  

    Design Verification Engineer Interview

    Anonymous Interview Candidate in Austin, TX
    No Offer
    Positive Experience
    Easy Interview

    Application

    I applied online. The process took 1 day. I interviewed at AMD (Austin, TX) in February 2012.

    Interview

    After applying online, received phone call a few days later from a lower-level employee with a couple of years experience. The phone interview was completely technical in nature, with no personality or leadership questions. Got invited to be flown down for an on-site interview, but was already in town, so was able to interview the next day.

    On-site interview was four 45-minute interviews with employees of different divisions within the working group, each one-on-one, and all of them completely technical with no non-technical questions. They also provided lunch with entry-level employees from working group.

    Was given the impression that would receive a follow-up contact within a few days but did not receive any contact until I inquired over a month later.

    Overall, the people were friendly and the campus was nice. Got the feeling that people enjoyed working there.

    Interview Questions

    • What do each of the bits represent in a memory address having a two-way associative cache with size: X words, Y lines, etc.   Answer Question

  5.  

    Design Verification Engineer Interview

    Anonymous Interview Candidate in Boxborough, MA
    No Offer
    Negative Experience
    Average Interview

    Application

    I applied online. The process took 2+ months. I interviewed at AMD (Boxborough, MA) in December 2011.

    Interview

    I had 2 phone interviews over 4 weeks. Generally discussed about current research projects. I was invited to meet the team in Boxborough, MA in December. I had around 7 personal interviews including one during lunch. The interviewers were pretty good asked questions on microarchitecture, projects, object oriented concepts, verification and logic design.
    I was informed by the recruiter that they'll have a decision by next day. I was told that the team was interested in my candidacy but wanted to conduct one more interview over Skype. I didn't here back from them for about 4 weeks when they told me that they have already identified a other candidate.
    Overall it was very poor and unprofessional job by the team manager and the recruiter.

    Interview Questions


  6. Helpful (1)  

    ASIC Design Verification Engineer Interview

    Anonymous Interview Candidate in Toronto, ON (Canada)
    No Offer
    Positive Experience
    Easy Interview

    Application

    I applied online. The process took a week. I interviewed at AMD (Toronto, ON (Canada)) in October 2016.

    Interview

    Applied online and interviewed with 2 people on campus. Simple Verilog/Digital Circuit/C++ questions. Should be able to answer them all after second year in university. Interviewers were kind and friendly, gave hints when stuck on problems. Also gave detailed descriptions about the job and what they do. Waiting for offer results.

    Interview Questions


  7.  

    ASIC Design Verification Engineer Interview

    Anonymous Employee in Markham, ON (Canada)
    Accepted Offer
    Neutral Experience
    Difficult Interview

    Application

    I applied online. I interviewed at AMD (Markham, ON (Canada)) in August 2016.

    Interview

    Approximately 4 hours in length. Multiple interviewers in 1 room. Asked about past experience on resume and furthermore conveyed through whiteboard in detail. Pen and paper design problems, data structures and algorithms, combinational and sequential circuits, etc.

    Interview Questions

    • What did you do at your previous co-op employer?   1 Answer
  8.  

    Design Verification Engineer II Interview

    Anonymous Employee in Bengaluru (India)
    Accepted Offer
    Positive Experience
    Average Interview

    Application

    I applied in-person. I interviewed at AMD (Bengaluru (India)) in June 2012.

    Interview

    3 technical rounds with different aspect of digital design , verification, system verilog, OOPS concept,
    USB3.0
    Perl, C and UVM
    Given to solve may circuit problems.
    Manager and Director interview happened separately
    How to code xor gate with multiplexers.
    How to code xor gate with multiplexers.
    How to code xor gate with multiplexers.How to code xor gate with multiplexers.How to code xor gate with multiplexers.

    Interview Questions

    • Core Digital
      Perl, C and UVM
      Given to solve may circuit problems
      How to code xor gate with multiplexers.   1 Answer

    Negotiation

    No


  9.  

    Design Verification Engineer Interview

    Anonymous Employee in Toronto, ON (Canada)
    Accepted Offer
    Positive Experience
    Average Interview

    Application

    I applied through college or university. I interviewed at AMD (Toronto, ON (Canada)) in November 2010.

    Interview

    Just one on-site interview before hiring. Was interviewed by two engineers on the team. Was for most parts a typical software engineering interview, only superficial questions about hardware. No explicit coding questions but lots of questions about how you would code it.

    After receiving the offer, I was also invited to a tour of the company's buildings and to meet the rest of the team.

    Interview Questions


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