Intel Corporation Analog Design Engineer Interview Questions | Glassdoor

Intel Corporation Analog Design Engineer Interview Questions

Interviews at Intel Corporation

17 Interview Reviews

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Analog Design Engineer Interview

Anonymous Interview Candidate
No Offer
Positive Experience
Average Interview

Application

I applied through an employee referral. I interviewed at Intel Corporation.

Interview

Phone interview followed by an in-person interview. The interview process took two months. The interview is well organized. Four one-on-one round. Each round is about 45 minutes. Device physics, logical design, inverter design, RC questions were asked

Interview Questions

  • device physics, Rc delay, Logical questions   1 Answer

Other Interview Reviews for Intel Corporation

  1.  

    Analog Design Engineer Interview

    Anonymous Interview Candidate
    No Offer
    Positive Experience
    Average Interview

    Application

    I applied online. I interviewed at Intel Corporation.

    Interview

    It was a phone interview that would test how my qualifications would best fit the position. The interview lasted for 20 mins which was scheduled for 30 minutes. I was told that I would be given the result of the interview in 7 days. I have answered almost all the questions during the phone interview. Having not heard even after 10 days I have contacted the person who interviewed me. I was told that they are interviewing few more candidates and would get back to me once they decide a decision and path forward. It has been a month and a half from the date of the phone interview and I have not heard anything back from the person.

    Interview Questions

    • Given two plates of a capacitor connected to a voltage source which side of each plate would be charged and what would be the polarity?   Answer Question
    • How would you represent practical capacitor using RLC elements?   Answer Question
    • A question upon my project went into the details of what kind of op-amp being used in the amplifier and how the performance is achieved   Answer Question
    • What is DIBL?   Answer Question
    • Few questions on the MOSFET operation including the DIBL effect, and how vt of a MOSFET is improved when technology is being scaled down. How would one increase the gate capacitance   Answer Question

  2. Helpful (1)  

    Analog Design Engineer Interview

    Anonymous Employee in Fort Collins, CO
    Accepted Offer
    Positive Experience
    Average Interview

    Application

    I applied through an employee referral. The process took 2 weeks. I interviewed at Intel Corporation (Fort Collins, CO) in February 2017.

    Interview

    Applied online and got a referral.
    Telephonic (normal call) interview which lasted for around 40 minutes - had technical and behavioral questions. Very friendly hiring manager - more like a conversation than an interview.

    Interview Questions

    • Asked me to describe a relevant project on my resume - Design of a 2 stage op amp.   1 Answer
    • Comparison between NAND & NOR gates - capacitance, area considerations, CMOS equivalent circuit. Was asked which one was better among the two.   Answer Question
    • Computer architecture basics: What is a memory hierarchy? What's the need for such a system?   1 Answer
  3.  

    Analog Design Engineer Interview

    Anonymous Interview Candidate in Santa Clara, CA
    No Offer
    Negative Experience
    Easy Interview

    Application

    I applied through college or university. The process took 3 weeks. I interviewed at Intel Corporation (Santa Clara, CA) in June 2016.

    Interview

    The interview was good. Most of the interviewers seemed to like me - except for the hiring manager (it seems). He was bit arrogant or let's just say that he wanted to hear the answers that he wanted to - without giving any regard to any other answers that might have been better to his existing design questions. I think because layoffs were in the air, back in June-July of 2016, he shrugged off saying that they have a "hiring freeze". Would have been a nightmare if I had to work under him. The process took 3 weeks.

    Interview Questions

    • Lab probing
      MOS amplifier configuration
      Some layout related questions   1 Answer

  4.  

    Analog Design Engineer Interview

    Anonymous Interview Candidate in Folsom, CA
    No Offer
    Positive Experience
    Average Interview

    Application

    I applied online. The process took 2 weeks. I interviewed at Intel Corporation (Folsom, CA) in January 2015.

    Interview

    It was an average level interview. There was two phone screen and 1 onsite interview. The process was quick. The phone screening included basic cmos questions and the onsite was more towards timing analysis and verilog vhdl questions

    Interview Questions

    • They asked questions mostly related to VLSI design and verilog vhdl   Answer Question

  5.  

    Analog Design Engineer Interview

    Anonymous Interview Candidate in Oregon City, OR
    No Offer
    Neutral Experience
    Average Interview

    Application

    I applied online. The process took 2 weeks. I interviewed at Intel Corporation (Oregon City, OR) in January 2016.

    Interview

    I applied online, got a mail for phone interview. I had onsite interview after 2 weeks. Phone interview was pre-screening, mostly basic question. On site interview had 7 technical rounds

    Interview Questions

    • RC, RL circuits, opamp gain bandwidth, bode plot, MOS Device characteristic, project related questions   Answer Question

  6. Helpful (3)  

    Analog Design Engineer Interview

    Anonymous Employee in Folsom, CA
    Accepted Offer
    Positive Experience
    Average Interview

    Application

    I applied through college or university. The process took 5 weeks. I interviewed at Intel Corporation (Folsom, CA) in April 2012.

    Interview

    got information from my college job board for an internship position. after a phone screener, they notified me that the internship position was no longer available, but they had an opening for a full-time employee instead. they arranged for an on-site interview which was about 6 hours of technical questions with many teams and a lunch break.
    the technical questions were mostly about digital design questions, even though everything in my resume's education history/projects were analog. the final interviewer noticed the discrepancy and called an analog team lead to give me an additional interview.
    I was really fortunate for this as I was completely out of my element for digital questions (even though they were pretty standard digital questions). I was able to convince the analog interviewer that I was not as dumb as I had sounded in all the digital interviews and they offered me a position with the analog team a few weeks later.

    Interview Questions

    • Digital: gate-level combinational logic to realize various functions, timing analysis for sequential logic, various fan-out loading questions (I don't remember too many details about this line of questioning, sorry)

      Analog: standard circuit design questions including: transistor equations, single transistor amplifiers, current mirrors, cascoding, diff-pairs, op-amps, analog layout pitfalls, and basic process-related concepts (parasitics, body effect, threshold voltage trick questions, etc).   Answer Question

  7.  

    Analog Design Engineer Interview

    Anonymous Interview Candidate
    No Offer

    Application

    I applied through college or university. I interviewed at Intel Corporation.

    Interview

    The first round is a phone interview, call was on time.
    Questions intend to test thinking ability and knowlegde.
    1.) Question on RC circuits
    2.) What happens when vdd and gnd of an inverter are swapped?
    3.) Draw the waveform of the output when a constant current source is connected to a capactor initially uncharged.

    Interview Questions

    • What happens when vdd and gnd of an inverter are swapped?   1 Answer
  8. Helpful (1)  

    Analog Design Engineer Interview

    Anonymous Employee in Boston, MA
    Accepted Offer
    Positive Experience
    Average Interview

    Application

    I applied online. I interviewed at Intel Corporation (Boston, MA) in March 2016.

    Interview

    2 phone interviews and 1 full day onsite. the onsite was taken on skype to balance the budget. It was a good experience.you could write on blackboard and answer and it was a live video though my video got stuck.

    Interview Questions


  9.  

    Analog Design Engineer Interview

    Anonymous Employee
    Accepted Offer
    Positive Experience
    Difficult Interview

    Application

    I applied in-person. The process took 1 day. I interviewed at Intel Corporation in November 2010.

    Interview

    The interview started from the morning to afternoon. Total 7 engineers and 2 HR guys talked to me. Engineers mainly asked technical questions. And HR guys mainly asked some things like your benefit.

    Interview Questions

    • How does the charge pump current impact the phase noise of PLL   Answer Question

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