Marvell Semiconductor ASIC Verification Engineer Interview Questions | Glassdoor

Marvell Semiconductor ASIC Verification Engineer Interview Questions

Interviews at Marvell Semiconductor

5 Interview Reviews

Experience

Experience
75%
25%
0%

Getting an Interview

Getting an Interview
75%
25%

Difficulty

2.8
Average

Difficulty

Hard
Average
Easy

 

ASIC Verification Engineer Interview

Anonymous Interview Candidate in San Jose, CA
No Offer
Positive Experience
Average Interview

Application

I applied online. I interviewed at Marvell Semiconductor (San Jose, CA).

Interview

Applied online. Got call after 1 month. Asked question on resume and question related to basic design, OOPs and System verilog. The interviewer was friendly and gave some hints to solve the problems. The interview went for almost 1 hour 15 minutes. Asked to do some coding in System verilog and C++

Interview Questions

Other Interview Reviews for Marvell Semiconductor

  1.  

    ASIC Verification Engineer Interview

    Anonymous Interview Candidate
    No Offer

    Interview

    A manager call me and give me a phone interview, the questions are not difficult but his accent is too heavy which make me saying pardon all the time... it lasts about 30 mins, and after that he let me ask some questions, and what I asked is if a verification engineer find a bug, who is responsible to fix it, the verification engineer or the designer? what he answered is the verification will report it then ask the designer to fix

    Interview Questions

    • how do you know you have cover all the case in your testbench   Answer Question

  2. Helpful (1)  

    ASIC Verification Engineer Interview

    Anonymous Employee in Santa Clara, CA
    Accepted Offer
    Positive Experience
    Average Interview

    Application

    I applied online. The process took 4+ weeks. I interviewed at Marvell Semiconductor (Santa Clara, CA) in December 2013.

    Interview

    The entire process took about a month. Two phone interviews followed by an onsite interview. Environment was very friendly. Basics of Comp. Arch., Perl, Verilog and OOPs asked.

    Interview Questions

  3. Helpful (1)  

    ASIC Verification Engineer Interview

    Anonymous Interview Candidate in Santa Clara, CA
    No Offer
    Positive Experience
    Easy Interview

    Application

    I applied online. The process took a week. I interviewed at Marvell Semiconductor (Santa Clara, CA) in October 2012.

    Interview

    Contacted by hiring manager and got arranged a phone interview a week later. First self-introduce. Then got asked four technical questions. Clock frequency divider, digital circuit design- given 4 inputs, outputs and timing diagram to design gate level circuits, Verilog question about signed and unsigned integer... The interviewer was very nice and asked me about my interest.

    Interview Questions


  4.  

    ASIC Verification Engineer Interview

    Anonymous Interview Candidate in San Jose, CA
    No Offer
    Neutral Experience
    Average Interview

    Application

    I applied through a recruiter. The process took 1 day. I interviewed at Marvell Semiconductor (San Jose, CA) in July 2010.

    Interview

    phone screen followed by in person interview.
    The interview was easy but I was not a match

    Interview Questions


Don't Miss Out On a Job You Love
Upload a resume to easily apply to jobs from anywhere. It's simple to set up.