Marvell Technology Design Engineer Interview Questions | Glassdoor

Marvell Technology Design Engineer Interview Questions

Updated Apr 20, 2017
104 Interview Reviews

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  1.  

    Systems Design Engineer Interview

    Anonymous Interview Candidate in Los Angeles, CA
    No Offer
    Neutral Experience
    Difficult Interview

    Application

    I applied online. The process took 4 weeks. I interviewed at Marvell Technology (Los Angeles, CA) in July 2016.

    Interview

    I had a phone interview at first. The phone interview lasted about half an hour and recruiter mainly asked questions about the projects in resume. The recruiter seemed like satisfied with my performance and told me that he will recommend me to the next round. Then I received an onsite interview invitation about 10 days later. But hr informed me that this position required knowledge about analog design while me focus is digital design. So I did bad in the onsite interview and only had 2 rounds (there suppose to be 5 rounds). Onsite interview asked a lot about digital design, such as pll. So passing the phone interview is not always a good thing, the position is not a good fit for me and this experience is a waste of time.

    Interview Questions


  2.  

    ASIC Design Engineer Interview

    Anonymous Employee
    Accepted Offer
    Positive Experience
    Average Interview

    Interview

    Phone screen interview and full day on-site technical interview
    Need to disclose GPA even for experienced professional. If you are under 3.5/4.0 then you will not able to have the interview.
    People are much nicer than other competing companies. Not too tricky or trying to find the interviewee's weakness as other companies.

    Interview Questions


  3. Helpful (2)  

    Logic Design Engineer Interview

    Anonymous Employee in San Jose, CA
    Accepted Offer
    Positive Experience
    Average Interview

    Application

    I applied through college or university. The process took 3 weeks. I interviewed at Marvell Technology (San Jose, CA) in February 2016.

    Interview

    My resume was referred to CPU group through an alumni from umich. Around 1 months after I submitted my resume, I got an email from the hiring manager. He asked me what was the good day for the phone interview. The phone interview took half an hour. One logic engineer asked me some basic questions about 5 stage in order pipeline and something about my resume. After 2 weeks came the invitation for onsite interviewIt. It took half day for meeting 5 people. Each interviewer spent ~ 30 minutes and asked ~ 5 questions. Each interviewer asked questions in the different areas.

    Interview Questions

    • Do we need PC to index second level table of branch predictor (i.e. pattern history table)? Why? What if bits of PC more than bits to index to pattern history table?   1 Answer
    • How can we use PRF to implement CMOV instruction?   1 Answer

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  5.  

    Analog Design Engineer Interview

    Anonymous Interview Candidate
    No Offer
    Negative Experience
    Difficult Interview

    Application

    I applied online. The process took 3+ months. I interviewed at Marvell Technology in February 2016.

    Interview

    Never got back. The recruiters seem to avoid certain schools. Too bad they can't sniff the best of talent from state schools. I had a friend who was never called back but a month later he got into Apple. Wake up Marvell recruiters. It's time for you guys to give every fresh graduate a fair opportunity.

    The int process was fairly exhaustive and pretty disappointing.

    Interview Questions


  6. Helpful (1)  

    ASIC Design Engineer Interview

    Anonymous Interview Candidate in Santa Clarita, CA
    No Offer
    Positive Experience
    Average Interview

    Application

    I applied online. The process took 3 weeks. I interviewed at Marvell Technology (Santa Clarita, CA) in January 2016.

    Interview

    I have applied this position on line last year . I have received a phone interview last week and there will be a phone interview this week. Asked the basic questions about the ASIC design and questions about the resume. Clock skew and jitter.Blocking and nonblocking. Setup and hold time question. Some basic question about the DFT. STA.

    Interview Questions

    • Describe the basic flow of DFT and the problem you met in the project   Answer Question

  7.  

    Design Engineer Interview

    Anonymous Interview Candidate
    No Offer
    Neutral Experience
    Average Interview

    Application

    I applied through a recruiter. I interviewed at Marvell Technology.

    Interview

    Got a phone call and asked a lot of about computer architecture stuff. Then ask a technical question as below. Overall experience is good. But Marvell recruiting seems not as professional as other companies.

    Interview Questions


  8.  

    Logic Design Engineer Interview

    Anonymous Interview Candidate
    No Offer
    Positive Experience
    Average Interview

    Interview

    I got a phone interview the other day directly from a current employee from their CPU group. He asked me about the basic concepts in computer architecture and it was not very hard. Also, he asked a lot about work experiences showed on my resume.

    Interview Questions


  9. Helpful (3)  

    ASIC Design Engineer Interview

    Anonymous Interview Candidate in Santa Clara, CA
    Declined Offer
    Positive Experience
    Average Interview

    Application

    I applied through an employee referral. The process took 2 weeks. I interviewed at Marvell Technology (Santa Clara, CA) in September 2015.

    Interview

    The first round was a phone interview of around 45 minutes. Focused entirely on linear pipeline and Out of Order Pipeline principles. The second round was a face to face interview at Santa Clara. 4.5hrs of interview (45 minutes per interviewer), was completely technical focussing on FSm, Verilog design, Cache and Tomasulo Out of order implementation.

    Interview Questions

    • 1st Round : Talked about RAW,WAW and WAR hazards and how is it solved/handled in both linear and OoO pipelines. Structural hazards caused and handled in OoO pipelines.
      2nd Round: Was interviewed by 5 interviewers (45 minutes with each). Focussed entirely on my resume. Asked in depth questions on Tomasulo out of Order Implementation and Multi Clock Domain Fifo Design. Some of the questions were on Sequence Detectors, Simple Verilog design questions, Frequency Dividers and circuitry design.
      One of the interviewers gave a scenario and asked to wite a code to validate the integrity of the circuit (to test our VERIFICATION thinking ).  
      Answer Question

  10.  

    ASIC Design Engineer Interview

    Anonymous Interview Candidate in Ann Arbor, MI
    No Offer
    Neutral Experience
    Average Interview

    Application

    I applied online. The process took 1+ week. I interviewed at Marvell Technology (Ann Arbor, MI) in August 2015.

    Interview

    I apply online for intern. It took around 10 days to get the email to tell I took 30 min interview for the intern. The question is all about cache part. I didn't prepare very well. Some question I answered is not quite well.

    Interview Questions


  11. Helpful (1)  

    ASIC Design Engineer Interview

    Anonymous Employee
    Accepted Offer
    Positive Experience
    Average Interview

    Application

    I applied online. I interviewed at Marvell Technology.

    Interview

    Phone interview for very basic digital design question i.e. setup/hold time, max clock frequency, and some project questions. Received onsite interview after 2 weeks, asked very detailed on my verilog project, fsm, fifo, cross domain clock, little perl and OOP.

    Interview Questions

    • never learned perl before so did not answer.   1 Answer

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