Open-Silicon Interview Questions | Glassdoor

Open-Silicon Interview Questions

Updated Jun 9, 2017
10 Interview Reviews

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  1.  

    Design Engineer Interview

    Anonymous Employee in Vellore (India)
    Accepted Offer
    Positive Experience
    Average Interview

    Application

    I applied through college or university. The process took 1 day. I interviewed at Open-Silicon (Vellore (India)) in March 2017.

    Interview

    The company visited our campus VIT ,vellore.
    Technical Test followed by 2 technical interviews.test consists of digital,EDC and network question.focus on digital part more.
    Questions are easy but some theoritical questions on network circuits are lengthy

    Interview Questions


  2. Helpful (3)  

    ASIC Design Engineer Interview

    Anonymous Interview Candidate in Chennai (India)
    No Offer
    Positive Experience
    Average Interview

    Application

    I applied through college or university. The process took 1 day. I interviewed at Open-Silicon (Chennai (India)) in December 2014.

    Interview

    Details
    Written round
    20 questions, 0.5 marks each and 5 subjective questions, 2 marks each
    digital, vlsi, networks

    Interview
    2 technical interview followed by a HR interview

    Out of the box thinking helps here
    project related question: gaussian distribution
    a lot of static timing analysis questions, tricky
    a D FF with clock input as an AND gate with inputs A and clk, now remove AND gate to give a clean clk but the functionality of the circuit should remain the same.
    talk about the kind of job they do, the kind of job I want to do, offers at hand, training details, date of joining details

    HR round:
    A talk about future aims of my life and culture at OS, the perks of being a small company, etc etc

    Interview Questions

    • Questions
      1st technical interview:
      Talk about yourself
      Talk about your project
      networks problem from question paper
      how does the power supply at home work between two to three rooms
      Flip flops timings questions
      frequency of 11 inverters in series
      detailed questioning of NMOS structure operations functioning secondary effects
      probe into channel length modulation
      CMOS inverter
      switching power there, static power and dynamic power formula
      logical puzzle:consider 2 taps (tap a and tap b) as inputs AND gate OR gate and XOR gate then take the same logic and build a water tank, locate the taps so that the functionality of the gates hold good
      Questions I got wrong in the question paper
      Resume-based questions  
      Answer Question

  3. Helpful (6)  

    ASIC Design Engineer Interview

    Anonymous Employee
    Accepted Offer
    Positive Experience
    Average Interview

    Application

    I applied through an employee referral. The process took 3 days. I interviewed at Open-Silicon.

    Interview

    Written round
    20 questions, 0.5 marks each and 5 subjective questions, 2 marks each
    digital, vlsi, networks

    Interview
    2 technical interview followed by a HR interview

    Interview Questions

    • 1st technical interview:
      Talk about yourself
      Talk about your project
      networks problem from question paper
      how does the power supply at home work between two to three rooms
      Flip flops timings questions
      frequency of 11 inverters in series
      detailed questioning of NMOS structure operations functioning secondary effects
      probe into channel length modulation
      CMOS inverter
      switching power there, static power and dynamic power formula
      logical puzzle:consider 2 taps (tap a and tap b) as inputs AND gate OR gate and XOR gate then take the same logic and build a water tank, locate the taps so that the functionality of the gates hold good
      Questions I got wrong in the question paper
      Resume-based questions

      2nd technical interview:
      Out of the box thinking helps here
      project related question: gaussian distribution
      a lot of static timing analysis questions, tricky
      a D FF with clock input as an AND gate with inputs A and clk, now remove AND gate to give a clean clk but the functionality of the circuit should remain the same.
      talk about the kind of job they do, the kind of job I want to do, offers at hand, training details, date of joining details

      HR round:
      A talk about future aims of my life and culture at OS, the perks of being a small company, etc etc  
      Answer Question

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  5. Helpful (1)  

    ASIC Design Engineer Interview

    Anonymous Employee in Islamabad, Islamabad (Pakistan)
    Accepted Offer
    Positive Experience
    Average Interview

    Application

    I applied through college or university. The process took 5 weeks. I interviewed at Open-Silicon (Islamabad, Islamabad (Pakistan)) in July 2012.

    Interview

    A three-sectioned written test followed by two comprehensive interviews.

    Interview Questions

    • Not much. A good preparation of electronics basics, verilog and C++ languages can easily get you through the test and interview.   Answer Question

    Negotiation

    Not much as I was a fresh graduate


  6.  

    ASIC Design Engineer Interview

    Anonymous Employee in Islamabad, Islamabad (Pakistan)
    Accepted Offer
    Positive Experience
    Difficult Interview

    Application

    I applied through an employee referral. The process took 2 weeks. I interviewed at Open-Silicon (Islamabad, Islamabad (Pakistan)) in June 2012.

    Interview

    The interview was a two step process. First interview was based on technical questions based on their technical expert or heads own experience in the digital circuit design. They were really expecting a lot in terms of knowledge regarding semiconductor physics as well. The second interview was more focused on my MS thesis work and how did I complete my circuit design.The office was very average , not very spacious but the setup was very clean.

    Interview Questions

    • How can you use an inverter in linear region?   Answer Question
    • How can you reduce the delay of an inverter?   Answer Question
    • What is salicide layer? How is it related to self-aligned gates?   Answer Question
    • Explain to us your thesis work? Designing the system from Top to Bottom?   Answer Question

    Negotiation

    You have to negotiate your offer otherwise they will start with really low pay package.


  7.  

    Verification Engineer Interview

    Anonymous Interview Candidate
    No Offer
    Negative Experience
    Difficult Interview

    Application

    I applied through a staffing agency. The process took 2 days. I interviewed at Open-Silicon in June 2012.

    Interview

    got call from HR after that had technical interviews

    Interview Questions

    • vmm is used extensively and people over there dont know ovm or plane system verilog is better thatn vmm   Answer Question

  8. Helpful (1)  

    Engineer Interview

    Anonymous Interview Candidate in Lahore (Pakistan)
    No Offer
    Positive Experience
    Easy Interview

    Application

    I applied through other source. I interviewed at Open-Silicon (Lahore (Pakistan)) in March 2012.

    Interview

    Send your CV to HR directly , there will be written as well as singly to panel interviews.

    Interview Questions

    • Its all upto your qualification and field you have chosen   Answer Question

  9.  

    ASIC Design Engineer Interview

    Anonymous Interview Candidate in Bengaluru (India)
    No Offer
    Neutral Experience
    Average Interview

    Application

    I applied through college or university. The process took 1 day. I interviewed at Open-Silicon (Bengaluru (India)) in October 2011.

    Interview

    interview was basically on basics of logic design.the unanswered questions of the written test paper

    Interview Questions


  10. Helpful (1)  

    Senior Physical Design Engineer Interview

    Anonymous Employee in Bengaluru (India)
    Accepted Offer
    Positive Experience
    Difficult Interview

    Application

    I applied online. The process took 2+ weeks. I interviewed at Open-Silicon (Bengaluru (India)) in December 2009.

    Interview

    I have applied online job portal, later called for 4 rounds of technical interview on a weekday.
    Interview lasted for 4hr/day stretching two days. Questions are technically strong.

    Interview Questions


  11. Helpful (6)  

    Senior Design Engineer Interview

    Anonymous Interview Candidate in Chennai (India)
    No Offer
    Positive Experience
    Difficult Interview

    Application

    I applied through college or university. The process took 1 day. I interviewed at Open-Silicon (Chennai (India)) in May 2008.

    Interview

    for freshers below is the interview process:
    2 rounds of interview ...
    all basic are asked
    duration of interview is 1 hrs each
    question on timing and asic design flow
    study from Digital design by rabaey
    question on digital design basic . puzzles
    some basic math question
    for experienced below is the interview process looking for jobs in STA,Synthesis:
    STA basic
    Synthesis basic
    Formal verification basic

    Interview Questions

    • setup/hold violating fotr path ? what can be done to fix such paths ?   Answer Question

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