Qualcomm Design Verification Engineer Interview Questions | Glassdoor

Qualcomm Design Verification Engineer Interview Questions

Updated Jun 26, 2017
15 Interview Reviews

Experience

Experience
61%
30%
7%

Getting an Interview

Getting an Interview
38%
23%
23%
7
7

Difficulty

3.3
Average

Difficulty

Hard
Average
Easy

15 Candidate Interview ReviewsBack to all Interviews

Filter

Sort: PopularDateDifficulty

Filter

Sort: PopularDateDifficulty
  1.  

    Design Verification Engineer Interview

    Anonymous Interview Candidate in San Diego, CA
    No Offer
    Positive Experience
    Average Interview

    Application

    I applied online. I interviewed at Qualcomm (San Diego, CA) in April 2017.

    Interview

    I applied through online qualcomm career portal and got an email 2 weeks later from HR,saying a staff engineer will call me for a phone technical interview.The phone interview was based on resume and lot of basic Systemverilog(writing assertion and constraints for different stimulus )/Verilog/Digital logic design questions.A week later received another email saying that I was selected for an onsite interview ( scheduled 2 weeks later).At onsite I had six (45-60 min each) one-on-one interviews with staff engineers .They said that result will be emailed two weeks later.

    Interview Questions

    • 1)Should be ready to write some logics (C/Verilog/System Verilog) on the spot .
      2)Blocking and Non-Blocking.
      3)Fork/join types and applications.
      4)Test bench architecture blocks.(asked to write a generalized code to implement gen and
            bfm).   1 Answer

  2. Helpful (1)  

    Verification Design Engineer Interview

    Anonymous Interview Candidate
    No Offer
    Positive Experience
    Average Interview

    Application

    I applied online. The process took 1 day. I interviewed at Qualcomm in November 2016.

    Interview

    I got an email for phone screen. Thoroughly asked all the project related questions in my resume. Also asked questions related to UVM since I had mentioned in my resume.

    Interview Questions

  3. Helpful (2)  

    Design Verification Engineer Interview

    Anonymous Interview Candidate
    No Offer
    Negative Experience
    Average Interview

    Application

    I applied online. The process took 3 weeks. I interviewed at Qualcomm.

    Interview

    Applied online on the job portal, Got a phone interview for the position of design verification engineer in Qualcomm QCT, Santa Clara. After phone interview was called upon for onsite interview which had 4-5 rounds. People who took interview were very detailed oriented and were looking for specific implementation details

    Interview Questions

    • All the questions were pretty basic and were related to fundamentals of logic design and verification.   Answer Question

  4. Helpful (1)  

    Design Verification Engineer Interview

    Anonymous Employee in Raleigh, NC
    Accepted Offer
    Positive Experience
    Average Interview

    Application

    I applied through an employee referral. The process took 2 weeks. I interviewed at Qualcomm (Raleigh, NC) in November 2014.

    Interview

    Two phone interviews - one with the manager, one with an engineer. First interview focused on previous relevant project experience (specific to hardware design projects). Second interview was broader about team projects and other software projects, to show experience. Interviewers were very supportive and shared a lot of information about their work and why they enjoy Qualcomm.

    Interview Questions


  5. Helpful (2)  

    CPU Design Verification Engineer Interview

    Anonymous Interview Candidate in Raleigh, NC
    No Offer
    Neutral Experience
    Average Interview

    Application

    I applied through a recruiter. The process took 1+ week. I interviewed at Qualcomm (Raleigh, NC) in March 2013.

    Interview

    Interview was scheduled in a weeks time and over the phone.
    The process was quick and followed up well.

    Interview Questions

    • He asked me about Data hazards, Instruction sets , Examples of branch prediction , 32 bit adder design. WAR and RAW Instruction examples. Basic Computer architecture questions.   Answer Question

  6.  

    Accepted Offer

    Application

    I applied online. The process took a week. I interviewed at Qualcomm.

    Interview

    phone interview. asked systemverilog, a few quite easy questions on digital design

    Interview Questions


  7.  

    Design Verification Engineer Interview

    Anonymous Employee in Santa Clara, CA
    Accepted Offer
    Positive Experience
    Average Interview

    Application

    I applied through a staffing agency. The process took a week. I interviewed at Qualcomm (Santa Clara, CA) in June 2012.

    Interview

    Phone Interview. I was called on the phone. My background was discussed. Then, we discussed System Verilog constructs and Assertions. We also discussed random constraints in System Verilog.
    Then, I was told that they would get back to me. I got a call from the Staffing firm to tell me that I was selected.

    Interview Questions

  8. Helpful (2)  

    QCT-Digital Design Verification Engineer Interview

    Anonymous Interview Candidate in San Diego, CA
    Declined Offer
    Positive Experience
    Average Interview

    Application

    The process took 1 day. I interviewed at Qualcomm (San Diego, CA) in November 2011.

    Interview

    Basic C, Universal Gates using CMOS, puzzles, analog basics

    Interview Questions

    • Given integers from 0-100 stored in an array of size 100 how will you find the missing number? Numbers are randomly entered in the array.   1 Answer
    • factorial of a number   Answer Question

  9.  

    CPU Design Verification Engineer Interview

    Anonymous Employee in Raleigh, NC
    Accepted Offer
    Positive Experience
    Difficult Interview

    Application

    I applied through a recruiter. The process took 5 days. I interviewed at Qualcomm (Raleigh, NC) in August 2011.

    Interview

    It was good.

    Interview Questions

    • Pipelining Hazards?   1 Answer
    • Do you know anything about RISC Architecture?   1 Answer

  10. Helpful (2)  

    Logic Design and Verification Engineer Interview

    Anonymous Interview Candidate in Raleigh, NC
    No Offer
    Positive Experience
    Difficult Interview

    Application

    I applied through college or university. The process took 1 day. I interviewed at Qualcomm (Raleigh, NC) in November 2010.

    Interview

    Had 2 panel interviews with 2-3 people in each. General questions regarding logic design and verifcation.

    Interview Questions

    • design a vending machine from architecture to rtl..   1 Answer

Don't Miss Out On a Job You Love
Upload a resume to easily apply to jobs from anywhere. It's simple to set up.