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ASIC Design Engineer Interview Questions

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“design a full adder with 2-1 mux”

“design a combinational circuit which counts the number of 1s in a 7-bit input .”

“Design a divide by 3 counter. Bonus for 50% duty cycle”

“which is hard to fix -- setup violation or hold violation? And why?”

“Complete the C function (body) that uses recursion to determine if the string is a palindrome”

“The I-V characteristic and five regions of MOS operation.”

“frequency divide by 3 clk circuit”

“List all possible ways to minimize the power dissipation of an ASIC chip.”

“There are 8 bits inputs ,only use full adder to detect how many logic 1's”

“is there any benefit to use cache if there is read miss for every access?”

110 of 106 Interview Questions