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ASIC Designer Interview Questions

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design a full adder with 2-1 mux

6 Answers

Full Adder can be implemented by two half adder; a half adder can be implemented by a XOR and AND gate. XOR and AND gate can be implemented by 2:1 MUX.

full adder can be got by 2 half adders and one OR gate; one half adder can be got by XOR, AND. Therefore, we need only OR, AND, XOR. All these three gates can be got by using MUX.?

Can be implemented using 8 Muxes.

design a combinational circuit which counts the number of 1s in a 7-bit input .

7 Answers

Design a divide by 3 counter. Bonus for 50% duty cycle

4 Answers

there is a disk half painted white and the other half black. There are two sensors and the outputs of these sensors are the only signals available. How will you determine if the disk is rotating clockwise or anti-clockwise?

3 Answers

which is hard to fix -- setup violation or hold violation? And why?

3 Answers

Complete the C function (body) that uses recursion to determine if the string is a palindrome

4 Answers

The I-V characteristic and five regions of MOS operation.

5 Answers

frequency divide by 3 clk circuit

2 Answers

List all possible ways to minimize the power dissipation of an ASIC chip.

2 Answers

How is processor performance affected when the instruction cache hit latency increases? How do you overcome that?

6 Answers
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