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Digital Design Engineer Interview Questions

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Create a 8 input AND gate using 3 4:1 muxes

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Without an enable bit on at least one of the mux's the maximum inputs would be 7.

Not so. You only need 2 4:1 muxes. Have the output of the first be the select to the second. 8 input and gate.

tie 3 0's to the three inputs of initial 2 4x1 mux, the 3rd input be an actual input, 2 sel be 2 inputs. feed the output of the results of the two muxes as sel to the 3rd mux and tie the last inputs to actual inputs and top two inputs to 0's.

What is MOESI?

2 Answers

logic design question setip hold time

1 Answer

Modify full precission adder to half precision.

1 Answer

scripting language code

1 Answer

State Machine, Timing Analysis

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Why there is a pinch-off during saturation mode of a CMOS device?

1 Answer

How Sense Amplifier works.

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Given integers from 0-100 stored in an array of size 100 how will you find the missing number? Numbers are randomly entered in the array.

1 Answer

What is a state machine? What's the applications for it?

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