This should be done in 2 iterations...keep 3 in each hand...higher weight indicates the heavier marble is in that set...now with 3 marbles select 2...if weights are equal then the marble kept aside is the heavier one..
2 iterations. Take any 4 out of 6 and weigh 2 vs 2. If it is equal, weigh the other 2 as 1vs 1 and find the heaviest. If the 2 v 2 is uneven, take the uneven marbles and weigh them as 1 vs 1 and find the heaviest one.
first think of how many bits do you need to detect the number of logic 1s in an 8 bit input. highest number will be 8. so you need 4 bits to represent that. how can you compute this value though? the optimal way i think to do this problem is to look at the properties of a full adder. there are 3 inputs (A, B, and Cin) and 2 outputs (S and Cout). You can hook each input of a full adder to a bit value. Therefore, what you end up having is 3 full adders FA0 to compute b0(A) + b1(B) + b2(Cin), FA1 to compute b3(A) + b4(B) + b5(Cin), and FA2 to compute b6(A) + b7(B) + 0 (we dont have a 9th bit). Each FA therefore will produce a 2 bit added sum S1, S2, and S3. Now we need to add S1 and S2 together with 2 FAs, which is pretty straight forward, and get S12. Then we have to add S3 to S12 using 3 FAs because a 3 bit number + a 2 bit number can equal a 4 bit number. We therefore use 7 FAs. Usually, the question is calculate the number of 1s in a 7bit number, which actually reduces the number of FAs to 4. we keep S1 and S2, but don;t need FA3, because we can use bit7 as a Carry in for our computation.
Are you not using a total of 8 FAs with your approach here? 3 + 2 + 3 = 8
A back-gate bias increases the magnitude of Vt. The mechanism is an increase in the depletion width of the induced p-n junction under the gate. This uncovers more fixed charge in the channel region. (The mobile charge gets "pulled" to the substrate contact.) Since the uncovered fixed charge has the same sign as the channel inversion charge, not as much channel inversion charge is needed to balance the charge on the gate. As a result, some of the inversion charge flows out the source terminal, so the channel isn't as inverted as it was prior to applying the substrate bias. Therefore, the gate voltage needs to increase in magnitude to restore the previous level of channel inversion.
Generally speaking, it is the so called body effect. For NMOS, with the decrease of VB, VTH increases.
There is no unexpected question. Asked a lot of behavioral questions. Nothing Difficult. But it is kind of interesting about one of the interviewer’s attitude. I don’t know it is pressure test or something else. One of them was very arrogant and even not sitting directly to you.
had similar experience i shenandoah facility one focused on my answer to one question while looking at me sideways with chin on hand, hr wrote down answer to question while making a facial expression and jerking head i interviewed 2 months ago felt great about it was told top candidate but job cancelled this time was completely uncomfortable and strongly feel had an effect on my interview my feedback was found better candidate i felt that the behavioral interview would hsve gone better if more curtousy was used
forgot to add in comment that second interview was done by different supervisors then the first