Engineering Design Interview Questions | Glassdoor

Engineering Design Interview Questions

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Oscillator from nand gate?

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CMOS Inverter , how to reduce the drive strength of Minimum size inverter

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Roman to Int

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Design a 2:1 MUX using half adders

3 Answers

Given two linked lists A and B, return a new linked list C, where C consists of all elements in A or B that are contained in only A or only B.

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List all possible ways to minimize the power dissipation of an ASIC chip.

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1 is heavier than the other 5 marbles among 6 mables . given a weight to find the heavier one.

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There are 8 bits inputs ,only use full adder to detect how many logic 1's

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Take a point on a surface. How do you know you're contained inside a box?

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how to generate a clock divide by 3

4 Answers
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