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FPGA Engineer Interview Questions

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what is the angle between the 2 hands at 5:15? what time will it be the next time the 2 hands coincide to the nearest minute?

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67.5 degree 5+5/11 hours = 5h 27min

12 hours 360 degrees: 30 degrees per hour. 2 hours between 3 and 5 oclock: 60 degrees. Minute hand goes much faster than hour hand. There are 10 minutes between 3 oclock and 5 oclock. In 10 minutes the minute hand will catch up to where the hour hand was. In 10 minutes the hour hand will move (10/60)*5 ticks=5/6ticks=almost a minute In 5/6 minutes the hour hand will move (5/6/60)*5=25/360ticks=approx 0.5 second. So common sense says it will be closest to 5:26 by the time it catches up.

The first part is 67.5. The second part: at 5:00, when the hour hand moves one tick, the minute hand would have moved 12 ticks (minutes). So the answer has to be strictly between the 2nd and 3rd tick, i.e. between 5:27 and 5:28. Since, for the minute hand to move from 5:24 to 5:27, the hour hand had also moved 1/4 of a minute from 5:27, i.e 5:27:15. A further move of 1/2 of a minute by the minute hand (i.e. 5:27:30), results in the hour hand moving to 5:27:17, which is too much. So they meet exactly at 5:27:16, to the nearest second only.

Describe in details some of the complex state machines that I have designs. Also their Pro and cons

1 Answer

FPGA designers that use Verilog are typically not good at using object oriented languages like System Verilog.

2 Answers

- how to implement a multiplexer in an FPGA?

1 Answer

They asked me 1)about the various concepts of verifying a design and also provided me scenarios as to how we can verify them . 2)to explain my previous projects and my responsibilities for each of the projects . 3)Also, the software team asked me a programming example. There were various teams of people wanting me to explain my previous job profile and responsibilities and explaining me about their company culture. Overall, It was a very good experience for me since I was fascinated by the fact that my job profile and trading can coincide !! and how!

Using the whiteboard, show us how you would architect an FPGA to handle a proposed problem. Using the whiteboard, show us VHDL or Verilog code to implement an FSM.

Write a state diagram to detect a specific binary sequence.

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