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Project Engineer Interview Questions

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Q2: A pnp transistor with its base connected to a voltage source, the V source is connected to a +10V source. The emitter of the transistor is connected to a resistance, and then to the same +10V source. The collector side is connected to a capacitor, which is not charged at t=0-. Given the graph of Vsource = 10 V stepping up at t = 0 to further, draw the graph of Vout. Vout is between the point of collector and capacitor.

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ANS: Vout should be constantly -10V until t=0, and will hit V=0 V linearly from V=-10 V after t=0.

Hi, Can you explain why it linearly increases? Are you assuming that Collector is tied to -10V? The pnp transistor is completely cutoff for the given biasing. The only way the capacitor is going to charge is through leakage currents. It is very slow and takes a lot of time. Please advise me if my analysis is correct.

How many different ways can you get water from a lake at the foot of a mountain, up to the top of the mountain?

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How do you deal in situations when your decisions are over ridden?

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Name a time when you had to lead a project and describe its outcome.

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Where do you see yourself in 5 years?

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What are your weaknesses?

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Give an example where addressed a conflict on the job site?

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It was the CATIA test itself

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Describe the EPC process and the interactions.

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What do you do now?

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