SRAM Design Engineer Interview Questions | Glassdoor

SRAM Design Engineer Interview Questions

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SRAM design engineer interview questions shared by candidates

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12V source in series with 3 caps of so and so capacitance, the last of which is hooked to gnd. If node between the first and 2nd cap is initially open, then closed, what are the node voltages.

2 Answers

Use Q=CV, and Q is the same for all 3 caps to figure it out.

Don't know why they mentioned "open, then closed". I see no difference. Solve the following eq. V1+V2+V3=12V C1V1=C2V2 C1V1=C3V3

why PMOS is slower than NMOS, questions on computing output of a circuit having complex NMOS pass gate connections etc

1 Answer

Why there is a pinch-off during saturation mode of a CMOS device?

1 Answer

C questions sheet ( 5 questions including questions on binary tree, difference between ++var and var++, sorting question)

1 Answer

How Sense Amplifier works.

3 Answers

He drew digital circuits with basic Gates and the delays and asked to draw waveforms

Difference between 6T and 8T sram cell transistor operating regions in general, and then specifically for inverter reverse body biasing in detail - what happens at transistor and device level. explain projects and stuff

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Flip Flops and setup hold time and Max Frequency of a sequential and Combinational circuit

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