ASIC Design Engineer I Jobs | Glassdoor

ASIC Design Engineer I Jobs

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  • 3.4
    AMD – Boxborough, MA
    Est. Salary $101k-$136k
    6 days ago 6d
    balance? Did I over allocation power stripes for all my power grid and make my design routability suffer? Have I review the latest… A day in the life of a Physical Design Engineer If you are part of the Physical Design team making a multibillion gates SOC…
  • 4.4
    SpaceX – Irvine, CA
    Est. Salary $109k-$142k
    8 days ago 8d
    life on Mars. SENIOR ASIC DESIGN ENGINEER RESPONSIBILITIES: As a Senior Design Engineer youll help design, implement and verify… FPGAs and/or ASICs. Participate in the micro architecture and design partition within the ASIC/FPGA. Implement design blocks using…
  • 4.7
    Butterfly Network – Guilford, CT
    Est. Salary $78k-$102k
    22 days ago 22d
    in Electrical Engineering, Computer Engineering, or Computer Science. 4+ years of ASIC (preferred) or FPGA design, verification… of ultrasound. Job Description The role of the Digital ASIC Designer offers the opportunity to work within the heart of the product…
  • 4.1
    VanderHouwen – New York, NY
    8 days ago 8d
    bit.ly/2enTpQN Sr. Digital ASIC Designer Exceptionally accomplished Sr. Digital ASIC Designers are sought to join a New Yorkbased… multiple aspects of the implementation process. Sr. Digital ASIC Designer Qualifications Masters or PhD preferred. Experience with…
  • 4.4
    SpaceX – Irvine, CA
    Est. Salary $146k-$191k
    15 days ago 15d
    on Mars. PRINCIPAL DIGITAL ASIC DESIGN ENGINEER OVERVIEW: This is a principal digital ASIC design role in the development of… principal digital ASIC designer, you will be responsible for all aspects of digital ASIC design focusing on RTL design, verification…
  • 2.7
    GLOBALFOUNDRIES – Santa Clara, CA
    Est. Salary $88k-$121k
    1 days ago 1d
    Summary of Role: The Front End Processing (FEP) ASIC Design Center engineer works with clients and the world-class GLOBALFOUNDIRES… with teams of physical design, timing, test and other FEP engineers to get our clients’ leading-edge designs to market. Essential…
  • FirstPass Engineering – Denver, CO
    Est. Salary $83k-$114k
    30+ days ago 30d+
    Degree in Electrical or Computer Engineering with five to ten years of experience in the design of ASIC/IC devices. The following skills… development of a large ASIC or a component within an ASIC Capture and documentation of design requirements Design partitioning and…
  • 3.4
    SanDisk – Milpitas, CA
    Est. Salary $81k-$107k
    12 days ago 12d
    As a design lead, work closely with the ASIC chip lead, ASIC architect and other functional leads to execute the ASIC development… the design team to ensure a successful tape-out As an individual contributor, work closely with ASIC architect, design lead…
  • 2.8
    Global Foundries – Bel-Nor, MO
    Est. Salary $61k-$83k
    1 days ago 1d
    Summary of Role: The Front End Processing (FEP) ASIC Design Center engineer works with clients and the world-class GLOBALFOUNDIRES… with teams of physical design, timing, test and other FEP engineers to get our clients’ leading-edge designs to market. Essential…
  • 3.1
    Toshiba America Business Solutions – San Jose, CA
    Est. Salary $76k-$103k
    7 days ago 7d
    As a part of the mission, architect will gather all the ASIC & F/W design requirements. This includes the assessment of in-house… the SSD Controller ASIC HW & FW specification development. Oversee & Mentor the Flash controller design team in mapping the…
  • 4.4
    SpaceX – Redmond, WA
    Est. Salary $102k-$143k
    3 days ago 3d
    human life on Mars. FPGA / ASIC Design Engineer Responsibilities: As a Design Engineer youll help design, implement and verify complex… FPGAs and/or ASICs. Participate in the micro architecture and design partition within the ASIC/FPGA. Implement design blocks using…
  • 3.1
    Toshiba America Business Solutions – San Jose, CA
    Est. Salary $76k-$103k
    21 days ago 21d
    As a part of the mission, architect will gather all the ASIC & F/W design requirements. This includes the assessment of in-house… the SSD Controller ASIC HW & FW specification development. Oversee & Mentor the Flash controller design team in mapping the…
  • 3.6
    Northrop Grumman – Baltimore, MD
    3 days ago 3d
    physics and semiconductor processing SoC and Mixed-Signal ASIC design for test and production test methodologies suitable for 32nm… Mixed-Signal ASICs Develop architectures within existing organizational constraints for SoCs and mixed-signal ASICs Working with…
  • 3.9
    Apple – Santa Clara, CA
    4 days ago 4d
    solutions. System-level design and IC micro-architecture definition of complex digital and mixed-signal ASICS including requirements… , and characterization plans for touch system ASIC’s FPGA emulation system design, lead pre-silicon system validation, prototype…
  • 4.4
    SpaceX – Redmond, WA
    Est. Salary $149k-$204k
    14 days ago 14d
    Masters degree in engineering or math. ASIC / FPGA / SoC System integration experience. Strong Silicon/ASIC design experience. One… enabling human life on Mars. PRINCIPAL ASIC ENGINEER RESPONSIBILITIES: Implement ASIC / SoCs / FPGAs for multiple products,…
  • 3.0
    Rambus – Sunnyvale, CA
    Est. Salary $103k-$142k
    1 days ago 13hr
    collaborate with the industry, partnering with leading ASIC and SoC designers, foundries, IP developers, EDA companies and validation… test structures. The candidate will additionally support defining I/O signaling topology, analyzing link performance, and simulating…
  • 3.6
    Northrop Grumman – Baltimore, MD
    25 days ago 25d
    physics and semiconductor processing SoC and Mixed-Signal ASIC design for test and production test methodologies suitable for 32nm… Mixed-Signal ASICs Develop architectures within existing organizational constraints for SoCs and mixed-signal ASICs Working with…
  • 3.4
    Mellanox Technologies – Westborough, MA
    Est. Salary $133k-$177k
    13 days ago 13d
    concepts, memory, I/O, hardware accelerators Expert-level engineering skills, including technical investigation, design, software engineering… libraries Executing a complete engineering process, including refining requirements, engineering design of data structures/algorithms…
  • 3.0
    Rambus – Sunnyvale, CA
    22 days ago 22d
    collaborate with the industry, partnering with leading ASIC and SoC designers, foundries, IP developers, EDA companies and validation… exceptional talent to join some of the brightest inventors and engineers in the world to explore their passions to develop products…
  • 3.6
    Raytheon – El Segundo, CA
    Est. Salary $85k-$111k
    1 days ago 17hr
    architectures (e.g. PPC, x86, etc.) • Background in ASIC development and design • Understanding of agile software methodologies is… Posting Title Sr Software Engineer I Requisition ID 91036BR Job Description The Software Engineering Center is seeking an enthusiastic…
  • 3.4
    Mellanox Technologies – Westborough, MA
    Est. Salary $82k-$115k
    23 days ago 23d
    10 years in VLSI Design Motivation to drive an exciting project Needs to be familiar with all aspects of ASIC integration including… physical design verification flows is required Familiar with various process related design issues including Design for Yield…
  • 4.4
    SpaceX – Redmond, WA
    Est. Salary $113k-$151k
    9 days ago 9d
    Masters degree in engineering or math. ASIC / FPGA / SoC System integration experience. Strong Silicon/ASIC design experience. One… of enabling human life on Mars. SENIOR ASIC ENGINEER RESPONSIBILITIES: Implement ASIC / SoCs / FPGAs for multiple products,…
  • 3.6
    Intel – San Jose, CA
    Est. Salary $89k-$119k
    13 days ago 13d
    blocks inside the ASIC and will also respond to interrupts, exceptions and other events arising out of the ASIC. The firmware will… Development Engineer! As a Network Software Development Engineer you will you will be responsible for the design and implementation…
  • 3.6
    Xilinx – San Jose, CA
    Est. Salary $105k-$131k
    1 days ago 22hr
    written and verbal skills. · Some background in FPGA or ASIC design · Effective project planning and execution… high speed FPGA I/O interfaces. Job responsibilities will include testing in hardware, building custom designs using Verilog or…
  • Smiths Interconnect – Tampa, FL
    Today 10hr
    FPGA or ASIC based digital modem designs • Work with 3rd party IP modem blocks and integrating them into the FPGA or ASIC • Perform… firmware design. • Able to work closely with other engineering disciplines on design requirements and specifications. • Design of…
  • 3.6
    Intel – Hudson, MA
    Est. Salary $90k-$125k
    13 days ago 13d
    contributions for design and implementation across all the components of a HPC system: firmware on a HPC Switch ASIC, embedded software… Development Engineer! The Intel Fabric Software Development Team is looking for an HPC SW Development Engineer to help develop…
  • 3.9
    Apple – Austin, TX
    Est. Salary $132k-$181k
    3 days ago 3d
    experience in physical design and large chip integration. Needs to be familiar with all aspects of ASIC integration including… Sr. Physical Design Engineer Job Number: 30146551 Austin, Texas, United States Posted: Apr. 12, 2017 Weekly Hours: 40.00…
  • 4.4
    SpaceX – Redmond, WA
    Est. Salary $102k-$138k
    1 days ago 1d
    PHYSICAL DESIGN ENGINEER RESPONSIBILITIES: You will be responsible for implementation of all phases of ASIC/SOC design (RTL2GDSII… all aspects of ASIC integration including Floorplanning, Clock and Power distribution, global signal planning, I/O planning and…
  • 3.3
    Altera – San Jose, CA
    Est. Salary $103k-$134k
    2 days ago 2d
    mastery of Unix based design environment, industry standard digital design tools, scripting languages and ASIC flows. · Comfortable… convergence, synthesis, ECO (Engineering Change Order) implementation and associated Structural/Physical Design flows and activities.…
  • 3.2
    Samsung – United States
    Est. Salary $76k-$106k
    5 days ago 5d
    into Verilog RTL. - Good Knowledge of Logic Synthesis and ASIC design flow. - RTL Lint and CDC - IP/Sub-block level verification… Modelling(TLM2.0) - High Level Synthesis. Role: RTL Design Verification Engineer - Hands-on in development of testbench in SystemVerilog…
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