ASIC Design Engineer Jobs | Glassdoor
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ASIC Design Engineer Jobs

1,137 Jobs

  • 4.4
    VeriSilicon Holdings Co., Ltd. – San Jose, CA
    EASY APPLY
    $90k-$119k(Glassdoor est.)
    8 days ago 8d
    -end complex RTL design Programming skills in Verilog Must be familiar with all stages of the ASICdesign flow (including specification… of computer graphics and low-power design techniques a plus Experience of GPU shader design a plus…
  • 3.9
    Fortinet – Sunnyvale, CA
    $105k-$137k(Glassdoor est.)
    19 days ago 19d
    top-notch ASICengineer to join our front end design team. The team is responsible for designing Fortinet’s next generation ASICs accelerating… Educational Requirement BS or MS in Electrical Engineering with 2+ years of relevant work experience. #LI-EL1…
  • 4.4
    NVIDIA – Santa Clara, CA
    $99k-$130k(Glassdoor est.)
    13 days ago 13d
    collaborating with other architects, ASICdesigners and verification engineers to design high frequency clocks. You should be… today. The GPU clocks group is looking for a top-notch ASICengineer to join the team. The Team is responsible for crafting all…
  • 3.5
    Peregrine Semiconductor – Austin, TX
    6 days ago 6d
    individuals. This position focuses on the design of CMOS ASIC (Application Specific Integrated Circuits) for ultra… must have demonstrated experience in sensor ASIC system and circuit analysis, design, test, product development, and mass production…
  • 3.6
    NantWorks – San Diego, CA
    $105k-$138k(Glassdoor est.)
    20 days ago 20d
    Job Title: Sr. Modem ASICDesignEngineer Job Type: Full-time Job Area: Engineering Hardware Location: California… Speed Digital Design, Low Power ASICDesign Education Requirements: Masters, Electrical Engineering with 2+ years of…
  • 3.9
    Ambarella – Santa Clara, CA
    $70k-$91k(Glassdoor est.)
    6 days ago 6d
    Electrical Engineering with 0-5 years of experience. * Good understanding of computer architecture, logic design and VLSI design… specifications for a next generation media processor. * Designing and implementing video compression logic, image processing…
  • 3.6
    Microchip Technology – Asia, TX
    $72k-$89k(Glassdoor est.)
    5 days ago 5d
    synthesis, DFT implementation, STA using an industry leading ASICdesign flow. It will require a proactive candidate with a proven… from an accredited engineering school. Requires prior working experience with the following tools: Design Compiler, PrimeTime…
  • ASICSoft, Inc. – San Jose, CA
    17 days ago 17d
    7-10+ years ASICDesign Strong RTL Design with SystemVerilog Experienced with Synthesis and Timing Closure FPGA Lab…
  • 4.0
    F5 Networks – United States
    $116k-$159k(Glassdoor est.)
    5 days ago 5d
    verification components in SystemVerilog UVM for complex designs. The DUT (Design Under Test) can be a block level module, where meticulousness… Job: In this position, you will develop cutting edge FPGA designs. As a part of a small team, you will have a significant role…
  • 3.0
    Samsung Research America – Richardson, TX
    EASY APPLY
    $113k-$145k(Glassdoor est.)
    5 days ago 5d
    in electrical engineering, computer science or computer engineering, Ph.D. preferred • 8+ years of ASICdesign experience • SoC… to define the ASIC requirements based on system concept • Review design trade-offs and provide high-level ASIC definition • Develop…
  • 3.7
    Intel – San Jose, CA
    $91k-$118k(Glassdoor est.)
    22 days ago 22d
    Job Description Component DesignEngineers are responsible for the design and development of electronic components. Responsibilities… Responsibilities may include: the design of chip layout circuit design, circuit checking, device evaluation and characterization, documentation…
  • 4.4
    Google – Mountain View, CA
    $97k-$122k(Glassdoor est.)
    NEW
    complex digital design blocks by fully understanding the design specification and interacting with designengineers to identify important… and corner-cases. Debug tests with designengineers to deliver functionally correct design blocks. Close coverage measures to…
  • 3.9
    Cisco Systems – San Jose, CA
    $106k-$148k(Glassdoor est.)
    8 days ago 8d
    Title: ASIC Physical DesignEngineer Location: San Jose, CA WHO YOU'LL WORK WITH: Our creative and talented team as Physical… Physical Design lead in San Jose, CA. You will work with ASIC Front-end teams to understand chip architecture and drive physical…
  • 3.4
    Casa Systems Inc – Andover, MA
    $88k-$120k(Glassdoor est.)
    15 days ago 15d
    Electrical Engineering, emphasis in Digital Design or related field with up to 5 years of experience with DSP, ASIC, or FPGA Design… seek to hire a FPGA DesignEngineer to join our growing Engineering team based in Andover, MA. The FPGA Engineer will architect, develop…
  • 3.8
    Marvell Technology – Santa Clara, CA
    $87k-$110k(Glassdoor est.)
    14 days ago 14d
    control, supporting P&R, design rule checks RTL design and give design review. Work with testing engineer to evaluate, validate and… Responsible for design, development, modification and evaluation of high-speed digital circuit for signal processing components…
  • 2.9
    Knowles – Itasca, IL
    $81k-$112k(Glassdoor est.)
    12 days ago 12d
    performance requirements for new ASIC projects Together with ASICdesign team to coordinate ASIC development activities to support… Job Description TITLE:Electrical Engineer (ASIC characterization and integration) BUSINESS: Mobile Consumer Electronics…
  • 3.7
    Quanergy – Sunnyvale, CA
    $84k-$110k(Glassdoor est.)
    7 days ago 7d
    Digital ASICDesignEngineer-17040008 Location: Sunnyvale, California, United States Full-time The Digital ASIC Design… characterize/test the performance of the designedASIC, and work to integrate the design into our LiDAR sensors. A successful…
  • 4.2
    Asic North – Tempe, AZ
    $71k-$100k(Glassdoor est.)
    NEW
    multiple facets of ASICdesign – RTL design, synthesis, design-for-test, static-timing-analysis, physical design, and verification… support design methodologies for new Electronic Design Automation (EDA) tools and technologies. Experience with IBM ASIC methodologies…
  • 3.6
    Ericsson-Worldwide – Austin, TX
    NEW
    involved in making 5G happen? The ASICDesign department at Ericsson is responsible for Digital ASIC and SoC development for all existing… standardization teams and market leading silicon vendors and ASICDesign houses. We are working with state of the art SI-technologies…
  • 3.1
    Toshiba America Electronic Components – San Jose, CA
    $135k-$173k(Glassdoor est.)
    NEW
    supporting ASIC, FPGA and Palladium platforms SoC level DFT and test structures for ATE working closely with ASIC Vendor Work… Responsibilities: Participate in the SSD Controller ASIC HW & FW specification development SoC top level integration…
  • 3.8
    MIT Lincoln Laboratory – United States
    $86k-$122k(Glassdoor est.)
    NEW
    Imager Technology Group is seeking to hire an ASICdesign and verification engineer to assist in the development of next generation… candidate will have experience in all phases of an ASICdesign flow including design, verification, synthesis, static timing, DFT,…
  • 4.8
    Fabergent USA – San Diego, CA
    $76k-$101k(Glassdoor est.)
    15 days ago 15d
    Job Description The Digital ASICDesign Team is currently seeking candidates for a junior position… responsible for the implementation of advanced DFT/DFD(design for test/design for debug) techniques for low power, high performance…
  • 3.8
    Marvell Technology – Santa Clara, CA
    $87k-$110k(Glassdoor est.)
    NEW
    Qualification: A BS, MS or PhD in Electrical or Computer Engineering or similar discipline Experience in behavioral and RTL… circuits. Perform RTL, pre- and post-layout verification of designs on block and system levels using simulation software. Execute…
  • 3.7
    Lockheed Martin – Grand Prairie, TX
    $72k-$97k(Glassdoor est.)
    NEW
    Programmable Gate Array (FPGA) DesignEngineer for a position in Grand Prairie, TX. Digital Design encompasses the full life cycle… of electronic subsystems development. As such, the FPGA DesignEngineer will be responsible for: Development, integration…
  • 3.7
    Acacia Communications – Maynard, MA
    $88k-$112k(Glassdoor est.)
    14 days ago 14d
    The Associate ASICEngineer will be a key hands-on contributor, interacting with internal stakeholders and outsourced partners… Reports to:Manager, ASIC Verification Location:Maynard, MA FLSA Status:Exempt Job Description: Recent and upcoming…
  • 2.8
    SK Hynix Memory Solutions – San Jose, CA
    $93k-$120k(Glassdoor est.)
    NEW
    Participating in the design of SSD controllers/SoC Implementing and delivering RTL Assisting in synthesis and gate-level…
  • 3.1
    Toshiba America Electronic Components – San Jose, CA
    $139k-$178k(Glassdoor est.)
    NEW
    leader of the Storage Research and Design Center SoC development team, the Director, ASICdesign is responsible for creating innovative… architecture(s) and new ASICdesign(s) with RTL design & implementation as part of the primary task. The candidate will work closely…
  • 3.8
    Marvell Technology – Santa Clara, CA
    $83k-$111k(Glassdoor est.)
    23 days ago 23d
    stages of ASICdesign flows, and is experienced with state-of-the-art design tools. The candidate is strong in logic design and verification… Provide design documentation, description and information to application engineers, field application engineers, test engineers, production…
  • 4.3
    SpaceX – Irvine, CA
    $110k-$144k(Glassdoor est.)
    13 days ago 13d
    life on Mars. SENIOR ASICDESIGNENGINEER RESPONSIBILITIES: As a Senior DesignEngineer youll help design, implement and verify… FPGAs and/or ASICs. Participate in the micro architecture and design partition within the ASIC/FPGA. Implement design blocks using…
  • 4.0
    ASML – San Jose, CA
    $101k-$126k(Glassdoor est.)
    15 days ago 15d
    applications? We are looking for a digital IC designengineer to be responsible for engineering of analog and digital components of the… with partners on the design process of the digital components. Together with the designengineering team from the partners…
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