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ASIC Design Jobs

1,632Jobs

  • 4.4
    VeriSilicon Holdings Co., Ltd. – San Jose, CA
    EASY APPLY
    $92k-$124k(Glassdoor est.)
    HOT
    front-end complex RTL design Programming skills in Verilog Must be familiar with all stages of the ASICdesign flow (including… of computer graphics and low-power design techniques a plus Experience of GPU shader design a plus…
  • 3.7
    Aricent – United States
    $61k-$80k(Glassdoor est.)
    8 days ago 8d
    disciplines: SoC Design (ASIC integration, Peripherals, Bus Design, DC/PC, LINT, PTSI) RTL Design (Functional/Structural… algorithms, ASICDesign, RTL Coding, JPEG, C/C++/SystemC, Modelsim, Synopsys DC, LEC, Spyglass) Physical Layer Design (PHY, USB…
  • 3.7
    Fortinet – Sunnyvale, CA
    $150k-$195k(Glassdoor est.)
    HOT
    performance ASICdesign from specification to system bring up; · FPGA design experience to verify large scale ASIC · Networking… Responsibilities: · ASIC architecture research, analysis and specification · High performance and high quality ASICdesign from specification…
  • 4.4
    NVIDIA – Santa Clara, CA
    $127k-$166k(Glassdoor est.)
    23 days ago 23d
    looking for a Senior ASICDesign Engineer: NVIDIA is seeking best-in-class ASICDesign Engineers to design and implement the world… experience working on ASICdesign and development Experience in micro-architecture and RTL development of complex designs in Verilog Exposure…
  • 4.0
    Apple – Santa Clara, CA
    $127k-$171k(Glassdoor est.)
    6 days ago 6d
    with 5+ years of work experience in ASICdesign RTL Logic Design in multi-million gate ASICs with Verilog or System Verilog Hands… ASICDesign Engineer - Fabric/Interconnect Job Number: 113144591 Santa Clara Valley, California, United States Posted:…
  • 4.0
    Apple – Santa Clara, CA
    $112k-$156k(Glassdoor est.)
    NEW
    quality design. Key Qualifications This position requires thorough knowledge of the ASICdesign flow, FE and Design verification… least 10+ years experience in ASICdesign flow Proven track record of high performance designs in high volume production for…
  • 4.0
    Softworld Inc. – Cambridge, MA
    9 days ago 9d
    Mixed Signal ASICsDesigner 6-12+ month contract Cambridge, MA Applicants selected will be subject to a U.S. Government… our team who are capable of specifying and architecting ASICs, designing circuits using the Cadence tool suite, leading tasks, and…
  • 3.7
    Juniper Networks – United States
    $96k-$124k(Glassdoor est.)
    NEW
    ) seeks ASICDesign Engineers to develop next generation of ASICs for new core routers, switches, and firewalls. Opportunity… 10+ years of ASICdesign experience Strong Verilog RTL coding skills Knowledge of Synopsys Design Compiler, Verplex LEC…
  • 4.4
    NVIDIA – Santa Clara, CA
    $102k-$134k(Glassdoor est.)
    24 days ago 24d
    are now looking for an ASICDesign Engineer: NVIDIA is seeking elite ASICDesign Engineers to design and implement the world… required Good understanding of ASICdesign flow including RTL design, verification, logic synthesis, timing analysis, floorplanning,…
  • 3.3
    Aerotek – Sunnyvale, CA
    $88k-$117k(Glassdoor est.)
    5 days ago 5d
    are looking for a ASICDesign Engineer that will hold the following responsibilities. Support customer's design through all phases… verification/LEC, DFT, ATE. *Requires an excellent understanding of ASICdesign and manufacturing flows targeting 28 nm and below with proven…
  • 3.1
    Fujitsu – Sunnyvale, CA
    $105k-$135k(Glassdoor est.)
    NEW
    www.socionext.com/en/ We are seeking a seasoned Design Engineer for our ASIC business unit. The primary responsibilities… tradeoff, RTL design using Verilog/System Verilog, SoC Integration CDC, LINT Requires an excellent understanding of ASIC design…
  • 3.5
    Boeing – El Segundo, CA
    $106k-$139k(Glassdoor est.)
    23 days ago 23d
    Digital ASICdesign and verification. Experience with ASIC development including architectural definition, detailed design implementation… in a team of ASIC engineers and Subsystem engineers. Demonstrated history of 1st pass success with ASICdesigns. Typical…
  • 3.6
    Infinera – Sunnyvale, CA
    $109k-$141k(Glassdoor est.)
    21 days ago 21d
    impact on internal designs and architecture. Micro-architecture and design of ASIC/FPGA: Includes design documentation, review… 0-2years of experience in ASICDesign. Participation in at least 1 full ASIC cycle as a designer from Arch to Bringup Good…
  • KP Recruiting Group – Los Angeles, CA
    EASY APPLY
    $88k-$117k(Glassdoor est.)
    5 days ago 5d
    Digital ASICdesign and verification. Experience with ASIC development including architectural definition, detailed design implementation… in a team of ASIC engineers and Subsystem engineers. Demonstrated history of 1st pass success with ASICdesigns. Typical…
  • 4.0
    Apple – Melbourne, FL
    $105k-$145k(Glassdoor est.)
    NEW
    Digital ASICDesign Engineer Job Number: 46092130 Melbourne (Florida), Florida, United States Posted: Dec. 19, 2016 Weekly… multi-meters, oscilloscopes and logic analyzers. Understanding of ASIC test methodology such as scan insertion, memory BIST and test…
  • 3.6
    Ericsson-Worldwide – Austin, TX
    NEW
    part of a fledgling design center? The ASICDesign department at Ericsson is responsible for Digital ASIC and SoC development… development. Good knowledge of ASIC technology. Good knowledge of ASICdesign environment and design methodology. Knowledge of radio…
  • 2.7
    L&T Technology Services – Milpitas, CA
    $88k-$116k(Glassdoor est.)
    4 days ago 4d
    equivalence and power analysis in 28nm , 16FFC technology node ASICdesigns Deep Knowledge in physical aware synthesis flows DC-… power designs Experience in developing and supporting automation and fully automated scripts/flows across all the ASIC implementation…
  • 3.6
    Ericsson-Worldwide – Austin, TX
    $84k-$115k(Glassdoor est.)
    4 days ago 4d
    part of a fledgling design center? The ASICDesign department at Ericsson is responsible for Digital ASIC and SoC development… standardization teams and market leading silicon vendors and ASICDesign houses. We are working with state of the art SI-technologies…
  • 3.7
    Intel Corporation – San Jose, CA
    $94k-$122k(Glassdoor est.)
    14 days ago 14d
    Experienced Hire ASICDesign Engineer Job Description Responsibilities: Oversees definition, design, verification, and… architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic design for…
  • 3.6
    Infinera – Sunnyvale, CA
    $159k-$204k(Glassdoor est.)
    NEW
    impact on internal designs and architecture. Micro-architecture and design of ASIC/FPGA: Includes design documentation, review… 7+ years of experience in ASICDesign. Participation in at least 1 full ASIC cycle as a designer from Arch to Bringup Good…
  • 3.6
    Ericsson-Worldwide – Austin, TX
    NEW
    part of a fledgling design center? The ASICDesign department at Ericsson is responsible for Digital ASIC and SoC development… standardization teams and market leading silicon vendors and ASICDesign houses. We are working with state of the art SI-technologies…
  • 4.1
    Quantum Tech USA – San Jose, CA
    $99k-$131k(Glassdoor est.)
    6 days ago 6d
    disciplines: SoC Design (ASIC integration, Peripherals, Bus Design, DC/PC, LINT, PTSI) RTL Design (Functional/Structural… , modeling) Physical Layer Design (USB, HDMI, DDR, MIPI) Digital Design for Mixed Signal ASICs (PLL, Phase-Lock-Loop, LNA,…
  • 3.9
    Quanergy – Sunnyvale, CA
    $88k-$115k(Glassdoor est.)
    16 days ago 16d
    Digital ASICDesign Engineer-17040008 Location: Sunnyvale, California, United States Full-time The Digital ASICDesign Engineer… characterize/test the performance of the designedASIC, and work to integrate the design into our LiDAR sensors. A successful…
  • 4.2
    Asic North – Boxborough, MA
    $75k-$106k(Glassdoor est.)
    11 days ago 11d
    multiple facets of ASICdesign – RTL design, synthesis, design-for-test, static-timing-analysis, physical design, and verification… support design methodologies for new Electronic Design Automation (EDA) tools and technologies. Experience with IBM ASIC methodologies…
  • HR Recruiting Services – Allentown, PA
    $73k-$98k(Glassdoor est.)
    20 days ago 20d
    experienced with digital ASICdesign including: ASIC RTL block design, block testing, top level design, top level simulation, documentation… 5+ years RTL design industry RTL design, Verilog, ASIC experience Working knowledge of ASICdesign flow and tools…
  • 3.9
    Palo Alto Networks – Santa Clara, CA
    NEW
    Opportunities: You will have chance to learn about ASIC/FPGA design, design verification, hardware lab testing through your independently… working with our ASIC/FPGA team which delivers chip for the hardware system. Past projects have ranged from ASIC/FPGA function module…
  • 3.9
    Hepco – Baltimore, MD
    8 days ago 8d
    contractor is seeking an ASIC Backend Design Engineers. Physical design of digital and mixed signal ASICdesigns targeting deep submicron… physical design of digital and mixed signal ASICdesigns targeting deep submicron foundry processes. Physical design shall include…
  • Approgence – San Diego, CA
    $76k-$105k(Glassdoor est.)
    NEW
    perform bit-exact simulation. Modem ASICDesign team is working with physical design engineer to deliver netlist, spec timing… Job Title : Senior ASIC/ RTL Design Engineer Job Location : San Diego & San Jose, CA Job Description : This is a…
  • 3.7
    MediaTek – San Jose, CA
    $128k-$188k(Glassdoor est.)
    1 days ago 12hr
    Familiar with ASICdesign process Experience with 16nm and below design Excellent knowledge in frontend design and physical… Interface with ASIC customers and define projects’ implementation tasks and plan. Responsibilities: Works with ASIC customers…
  • 3.2
    MaxLinear Inc. – Poplar, WI
    6 days ago 6d
    simulations for stdcells and memory Familiarity with Overall ASICDesign Flow Familiarity with Timing Constraints Familiarity… MaxLinear is seeking an IP Design Engineer to join our Singapore office. Characterization, circuit design & QA experience of Std…
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