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ASIC Design Senior Staff Engineer Jobs

77 Jobs

  • 3.9
    Cohere Technologies, Inc – Santa Clara, CA
    $95k-$128k(Glassdoor est.)
    HOT
    open position for a Senior FPGA/ASICDesignEngineer in our Santa Clara office. In this position, you will design, implement and test… perform the detailed design and verification. This position reports directly to the Director of FPGA/ASICEngineering Required Qualifications…
  • 3.7
    Lockheed Martin – Sunnyvale, CA
    $133k-$175k(Glassdoor est.)
    5 days ago 5d
    Digital Processor ASIC/FPGA Designer: The SeniorStaffASIC/FPGA DesignEngineer will be working in the RF Center of Excellence… the effort to meet the customer requirements. The SeniorStaff FPGA/ASICdesigner will provide technical support across the enterprise…
  • 3.7
    Lockheed Martin – Sunnyvale, CA
    $88k-$119k(Glassdoor est.)
    5 days ago 5d
    Digital Processor ASIC/FPGA Designer: The StaffASIC/FPGA DesignEngineer will be working in the RF Center of Excellence (RF… following tasks. Participate as a senior member of a small technical team of ASIC/FPGA designers to achiev project goals. Assist…
  • 3.8
    Synopsys – United States
    NEW
    Business Title ASIC Digital Design Engr, Staff Requisition Number 14859BR Hiring Location(s) USA - California - California… . Generates design and verification specifications. Determines architecture design, logic design, test bench design, and test cases…
  • 3.6
    Microchip Technology – Lake Forest, CA
    $62k-$86k(Glassdoor est.)
    10 days ago 10d
    complex, highly integrated ASICs  - Design documentation and IP generation. Requirements:  - With a minimum of an MS degree… product Wireless group. As a senior member of the team, the designer will be responsible for systems design and implementation tasks…
  • 3.9
    Synaptics – San Jose, CA
    NEW
    qualified applicants to apply for a career opportunity as a SeniorStaffASIC Architect in our Platform Architecture department. This… architectures for the next-generation of touch-sensing and fingerprint ASIC’s. A solid understanding of analog and digital circuitry is required…
  • 3.7
    Lockheed Martin – Littleton, CO
    $123k-$172k(Glassdoor est.)
    19 days ago 19d
    and attenuators, ASIC's, MMIC's, RFIC's, beem steering command and control, Etc. Detailed knowledge of RF design tools such as… 'The RF Payloads Center of Excellence is seeking an RF designengineer for the new technology development of Electronically Steerable…
  • 2.9
    Harris – Clifton, NJ
    $68k-$93k(Glassdoor est.)
    NEW
    from more senior functional staff. Qualifications: 0-2 years experience with a BS in Electrical Engineering or related… as computer chips (ASIC, CPLD, FPGA), circuit boards, computer systems, and electrical components. Designs new or modifies existing…
  • 3.7
    Lockheed Martin – Littleton, CO
    $75k-$108k(Glassdoor est.)
    19 days ago 19d
    Digital Payloads, RF Architecture, Microwave Design, Digital Signal Processors, ASICs, FPGAs, DSP, Signal Processing, Space Borne… support system level requirements. Provides periodic status to senior program management and to the customer at monthly reviews and…
  • 3.7
    Lockheed Martin – Sunnyvale, CA
    $88k-$119k(Glassdoor est.)
    NEW
    Digital Processor ASIC/FPGA Designer: The StaffASIC/FPGA DesignEngineer will be working in the Optical Payloads Center of… : Lead or participate as a senior member of a small technical team of ASIC/FPGA designers to achieve project goals. Establish…
  • 3.7
    Qualcomm – San Diego, CA
    $137k-$182k(Glassdoor est.)
    10 days ago 10d
    Job Id E1959532 Job Title Senior/StaffASICEngineer – SIP (System in Packaging) Substrate & Assembly Post Date… suppliers, internal design and product teams as well as NPI. The team is looking for an experienced packaging engineer who has worked…
  • 3.8
    Xilinx – San Jose, CA
    $133k-$197k(Glassdoor est.)
    HOT
    plus) Fundamental experience with EDA tools for FPGA and ASICdesigns. Experience with Vivado, ISE or Quartus required (ModelSim… environment is a plus In-depth knowledge of VHDL or Verilog design for ASIC and FPGA Excellent written and verbal communication skills…
  • 3.8
    Xilinx – Longmont, CO
    $125k-$162k(Glassdoor est.)
    14 days ago 14d
    Has excellent working knowledge of the entire FPGA or ASICdesign process and tool flow, with in-depth expertise in timing… interfaces effectively with industry forums to identify designengineering practices of potential benefit to Xilinx Software…
  • 2.9
    Avago Technologies – San Jose, CA
    $95k-$130k(Glassdoor est.)
    NEW
    implementations This requisition is approved for the SeniorStaffEngineer level. At this level, candidates should have BSEE w/… implementing, and testing high performance communications/networking ASIC products. Candidates with other qualifications will be considered…
  • 3.1
    MaxLinear Inc. – Carlsbad, CA
    $99k-$147k(Glassdoor est.)
    HOT
    cross-functional teams consisting of Communications Systems Engineers, RFIC, ASIC and SW. Matlab and C/C++ expertise, SystemC expertise… MaxLinear is seeking top notch engineers to join our Communications Systems Engineering team in either Carlsbad, CA (north San…
  • 3.8
    Xilinx – San Jose, CA
    $98k-$133k(Glassdoor est.)
    11 days ago 11d
    years progressive experience as DesignEngineer, Hardware Engineer, Member of Technical Staff or related occupation. Alternate… Oversee definition, design, verification, and documentation for Xilinx Application Specific Integrated Circuit (ASIC) development. Determine…
  • 3.8
    Synopsys – Mountain View, CA
    $95k-$132k(Glassdoor est.)
    5 days ago 5d
    VHDL) and has a strong understanding of ASICdesign flow, VLSI, and/or CAD engineering. Knowledge of competitive EDA tool products… Business Title Application Engineer, Staff Requisition Number 15123BR Hiring Location(s) USA - California - Mountain View…
  • 3.4
    Molex – Camarillo, CA
    $71k-$98k(Glassdoor est.)
    6 days ago 6d
    /or ASICdesign experience. Familiarity with high speed signal acquisition and processing, Multi-clock domain logic design, high… the FPGA design to interface to the hardware properly. Consult with hardware engineers and other engineeringstaff to evaluate…
  • 3.0
    Battelle Energy Alliance – Columbus, OH
    27 days ago 27d
    experience in integrated circuit design and fabrication. Firm understanding of FPGA and/or ASICdesign flows. Ability to develop… Register Transfer Level (RTL) design and netlists. Solid understanding and experience with FPGA/ASIC synthesis tools such as Xilinx…
  • 2.8
    SK Hynix Memory Solutions – San Jose, CA
    $102k-$141k(Glassdoor est.)
    13 days ago 13d
    with Physical Design team to implement design Qualifications: BS, MS or PhD degree in Electrical Engineering or Computer… perform timing analysis Work with Design Verification and emulation team to validate design Develop functional models for architectural…
  • 3.8
    Encore Semi – Santa Clara, CA
    $162k-$208k(Glassdoor est.)
    NEW
    Position Title: Senior / StaffDesign Verification Engineer Status: Full-Time Employment (W2) Work Location: Bay Area,… incorporating VIPs to functionally stress designs flushing bugs out quickly to enable rapid ASICdesign execution. Beyond the Verification…
  • 2.7
    Microsemi – Tigard, OR
    18 days ago 18d
    milestones. Mentor Senior/Junior team members and contractors on Chip-level and Macro-level ASICdesign and implementation flows… Microsemi is currently looking for a Staff level ASIC Implementation Engineer to join our team in our Portland Oregon office.…
  • 3.1
    Huawei Technologies – San Diego, CA
    $106k-$145k(Glassdoor est.)
    24 days ago 24d
    Computer Engineering and/or Computer Science and/or Electrical Engineering 8+ years industry experience in ASICdesign… innovation to deliver a better future...faster. SeniorStaffdesignEngineer Location: San Diego, CA (R&D) Req #: 8434…
  • 3.5
    Broadcom – San Jose, CA
    $89k-$122k(Glassdoor est.)
    28 days ago 28d
    implementations This requisition is approved for the SeniorStaffEngineer level. At this level, candidates should have BSEE w/… implementing, and testing high performance communications/networking ASIC products. Candidates with other qualifications will be considered…
  • 3.3
    Hewlett Packard Enterprise – Santa Clara, CA
    $126k-$179k(Glassdoor est.)
    28 days ago 28d
    Senior Switching Platform Engineer Job Description: Analyzes, designs, programs, debugs and modifies switch software operating… operating system and features (e.g., low level software and ASIC drivers, networking and operational features, programmability…
  • 3.7
    Qualcomm – San Diego, CA
    27 days ago 27d
    Job Area Engineering - Hardware Location California - San Diego Job Overview The Digital ASICDesign Team is currently… Job Id E1958335 Job Title SeniorStaff DFT Engineer Post Date 08/29/2017 Company Division Qualcomm…
  • 2.7
    Microsemi – Colorado Springs, CO
    $74k-$109k(Glassdoor est.)
    NEW
    Provide on-site debugging and design updates to existing clients Work with divisional designstaff to drive closure on customer… Computer Engineering with 5 years of experience or masters with 3 years. Requires a thorough knowledge FPGA design, including…
  • 4.3
    Maxonic – Richardson, TX
    12 days ago 12d
    Successful completion at least one ASIC development as a designer from system definition, architecture design, implementation, verification… to define the ASIC requirements based on system concept · Review design trade-offs and provide high-level ASIC definition…
  • 3.8
    Xilinx – San Jose, CA
    $127k-$185k(Glassdoor est.)
    NEW
    algorithms for ASICs and/or FPGAs. Expert with C , data structures, algorithms and its application to electronic design automation… (ISM) Wired Wireless SeniorStaff Software Engineer - FPGA Implementation Tools We are looking for…
  • Magma Design – Mountain View, CA
    NEW
    Business Title ASIC Digital Design Engr, Staff Requisition Number 14859BR Hiring Location(s) USA - California - California… . Generates design and verification specifications. Determines architecture design, logic design, test bench design, and test cases…
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