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ASIC Design Verification Engineer Jobs

855 Jobs

  • 3.7
    Marvell Technology – Aliso Viejo, CA
    HOT
    including design, verification, and synthesis. Must have strong EDA tool skills and in-depth knowledge of ASICdesign flows.… Responsibilities: Responsible for design, verification, implementation (ASIC) for high-performance, physical layer,…
  • 4.6
    Acacia Communications – Maynard, MA
    $74k-$104k  (Glassdoor Est.)
    11 days ago 11d
    , ASICVerification Location: Maynard, MA FLSA Status: Exempt Job Description: The ASICDesignVerification Engineer… Assist chip level design tradeoffs by working with designengineers Participate in review of designverification coding and coverage…
  • 3.9
    Quanergy Systems, Inc. – Sunnyvale, CA
    HOT
    JOB DESCRIPTION: The Digital ASICDesignEngineer at Quanergy will be responsible for collaboratively developing control and… characterize/test the performance of the designedASIC, and work to integrate the design into our LiDAR sensors. CORE RESPONSIBILITIES…
  • 3.9
    Cisco Systems – San Jose, CA
    $91k-$116k  (Glassdoor Est.)
    We're Hiring
    Entity Cisco's Core ASIC Group(CAG) seeks an ASICDesignVerificationEngineer to verify next generation ASICs for enterprise switches… Role & Responsibilities You will participate in ASICdesignverification for high end switching products. Responsibilities include…
  • 3.2
    MaxLinear Inc. – Carlsbad, CA
    $78k-$108k  (Glassdoor Est.)
    27 days ago 27d
    MaxLinear is seeking VerificationEngineers to join our ASIC team in either of our Carlsbad or Irvine, CA design centers. In this… experienced engineers. You need only apply to one of the open positions. SystemVerilog and UVM for verifying complex ASIC/FPGA…
  • 3.2
    MaxLinear Inc. – Irvine, CA
    $83k-$114k  (Glassdoor Est.)
    4 days ago 4d
    seeking VerificationEngineers to join our ASIC team. This position can be based in either of our Carlsbad or Irvine, CA design centers… Knowledge of verification IP and functional coverage techniques Experience with signoff of SoC designs with coverage metrics…
  • 3.7
    Marvell Technology – Santa Clara, CA
    $105k-$132k  (Glassdoor Est.)
    NEW
    BS in Electrical Engineering/Computer Engineering and at least 10 years of experience in ASIC/SOC design Familiar with digital… digital IC design methodologies, understands all stages of ASICdesign flows, and is experienced with state-of-the-art design tools.…
  • 4.6
    Acacia Communications – Maynard, MA
    $97k-$136k  (Glassdoor Est.)
    11 days ago 11d
    Reports to: Manager, ASIC Physical Design Location: Maynard, MA FLSA Status: Exempt Job Description: Primary… production highly integrated ASICs Key Essential Functions: Deliver on physical design implementation activities such…
  • 3.8
    Xilinx – San Jose, CA
    21 days ago 21d
    experience in high-speed networking/CPU/ASICdesigns In-depth expertise and knowledge of CPU/ASIC/ASSP architecture, microarchitecture… implementation and verification Extensive experience with high speed logic design, timing and power optimization design techniques,…
  • 3.8
    Xilinx – San Jose, CA
    $132k-$167k  (Glassdoor Est.)
    21 days ago 21d
    Wireless FDST Verification group is looking for a Senior DesignVerificationEngineer to provide technical leadership… full chip verification. The individual will help design, develop and use simulation and/or formal based verification environments…
  • 3.7
    Juniper Networks – Sunnyvale, CA
    25 days ago 25d
    are looking to hire an ASICverificationengineer with extensive experience on networking ASICverification, with in-depth knowledge… functioning silicon. You will be part of a verification team responsible of delivering ASICs for complex networking systems. You will…
  • 4.6
    Acacia Communications – Maynard, MA
    $128k-$168k  (Glassdoor Est.)
    11 days ago 11d
    colleagues in RTL design, physical design, ASICdesignverification (DV), software, and hardware. The role is at the junction… Electronic Engineering preferred 5+ years of relevant experience Deep understanding of communications DSP and ASICdesign Extensive…
  • Software Programming Group – Santa Clara, CA
    17 days ago 17d
    We are looking for ASICverificationengineers with top level DV experience. The candidate will develop test plans, test benches… multiple state machines and protocol rules. Experience with verification methodologies such as UVM/VMM/OVM is required, and a strong…
  • 3.2
    Rambus – Chapel Hill, NC
    $109k-$145k  (Glassdoor Est.)
    12 days ago 12d
    seeking a principal engineer that possess experience in design and verification of complex memory subsystem ASIC’s. The new team member… studies, detailed design and verification with close collaboration with System Architects, ASIC, FPGA, Verification and SW teams.…
  • 3.7
    Marvell Technology – Aliso Viejo, CA
    $85k-$108k  (Glassdoor Est.)
    7 days ago 7d
    including design, verification, and synthesis. Must have strong EDA tool skills and in-depth knowledge of ASICdesign flows.… position. Responsibilities: Responsible for design, verification, implementation (ASIC) for high-performance, physical layer, high…
  • 4.4
    Google – Sunnyvale, CA
    $98k-$123k  (Glassdoor Est.)
    19 days ago 19d
    interacting with designengineers to identify important verification scenarios. Create a constrained-random verification environment… with designengineers to deliver functionally correct design blocks. Close coverage measures to identify verification holes…
  • 3.8
    Xilinx – San Jose, CA
    $85k-$117k  (Glassdoor Est.)
    21 days ago 21d
    the ONEXILINX team. FDST Verification group is looking for a Senior DesignVerificationEngineer to provide technical leadership… full chip verification. The individual will help design, develop and use simulation and/or formal based verification environments…
  • 4.0
    Abjayon Inc – San Diego, CA
    4 days ago 4d
    assertion based verification Required Skills/Experience: Minimum of 3-14 year experience in ASICVerification Strong knowledge… knowledge with ASIC Simulation Tool & Verification Language: all sign-off simulators, Verdi/Siloti Fluent in verification language…
  • 3.8
    Xilinx – San Jose, CA
    $80k-$110k  (Glassdoor Est.)
    21 days ago 21d
    Define verification architecture, develop verification plans, implement verification environment and verify ASIC blocks and… AS part of the SOC performance verification team, you will be working closely with the design, architecture team for ensuring…
  • 3.6
    Synaptics – San Jose, CA
    $99k-$126k  (Glassdoor Est.)
    22 days ago 22d
    Electrical Engineering Six months experience in system Verilog, UVM based constraint random tests, functional verification at both… Responsible for the execution of functional simulation-based verification at a block level, subsystem and full-chip using techniques…
  • 3.4
    Ericsson-Worldwide – Austin, TX
    $82k-$113k  (Glassdoor Est.)
    We're Hiring
    Top-Level ASIC and SoC verification, test bench development, HW emulation, HW acceleration, SW driven verification. Our verificaton… verificaton engineers are key members of a dynamic, combined design/verification team - with opportunities for learning and trying…
  • 4.2
    Asic North – Tempe, AZ
    $70k-$99k  (Glassdoor Est.)
    22 days ago 22d
    facets of ASICdesign – RTL design, synthesis, design-for-test, static-timing-analysis, physical design, and verification. Ability… support design methodologies for new Electronic Design Automation (EDA) tools and technologies. Experience with IBM ASIC methodologies…
  • Technical Link – Tucson, AZ
    NEW
    functional verification of ASICs/FPGAs as-needed, as well as lead/mentor teams of verificationengineers. The Verification Electrical… Industrial Engineering, or other related science discipline. A minimum of eight (8) years of ASIC/FPGA Electrical Engineering design…
  • 3.8
    Samsung Semiconductor, Inc. – San Jose, CA
    $99k-$138k  (Glassdoor Est.)
    23 days ago 23d
    analysis Chip-level physical verification Samsung physical design methodology support for ASIC customers REQUIRED SKILLS… JOB TITLE:Sr. ASICEngineer - Physical Design REQUISITION IDDSA31799 OVERVIEW High performance computing and networkng…
  • 4.8
    OSI Engineering – San Diego, CA
    5 days ago 5d
    JOB DESCRIPTION: Seeking a ASICDesignVerificationEngineer for a Major Consumer Device company in San Diego, CA Responsibilities… assertion based verification. Must Have Skillsets: Minimum of 3-14 year experience in ASICVerification. Strong knowledge…
  • 3.8
    Samsung Semiconductor, Inc. – San Jose, CA
    $99k-$138k  (Glassdoor Est.)
    9 days ago 9d
    innovative and integrated ASIC services and solutions. Samsung Foundry is expanding ASICEngineering to support this needs in North… JOB TITLE Senior ASICEngineer, Synthesis REQUISITION IDDSA31818 OVERVIEW High performance computing and networkng have…
  • 3.9
    Cisco Systems – San Jose, CA
    $104k-$144k  (Glassdoor Est.)
    We're Hiring
    ’s or Master’s degree in Electrical Engineering 0-2 years of ASICdesign and verification experience Knowledge and Skills:… an expert VerificationEngineer to engage in new development of our Nexus 9K family. You will have an ASICverification background…
  • 3.9
    Cisco Systems – San Jose, CA
    $102k-$140k  (Glassdoor Est.)
    4 days ago 4d
    ’s or Master’s degree in Electrical Engineering 8-12 years of ASICdesign and verification experience Knowledge and Skills:… Actively work with the verification team to deliver ASICs with high quality Actively work with the physical design team to resolve implementation…
  • 4.3
    NVIDIA – Austin, TX
    $130k-$172k  (Glassdoor Est.)
    4 days ago 4d
    for a Senior ASICVerificationEngineer: NVIDIA is seeking an elite ASICVerificationEngineer to verify the design and implementation… working on verifying ASICdesign using advanced verification methodologies. You are expected to understand the design and verify its…
  • 4.3
    Quantenna Communications – San Jose, CA
    $99k-$128k  (Glassdoor Est.)
    We're Hiring
    related disciplines with 5+ years of experience in digital ASICdesign Demonstrated programming proficiency using Verilog/System… and debug on PCIE and EMAC issues. Experience in various ASICdesign tools for Lint, CDC, Formal, STA, Synthesis Good coordination…
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