ASIC Physical Design Engineer Jobs | Glassdoor
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ASIC Physical Design Engineer Jobs

274 Jobs

  • 3.9
    Cisco Systems – San Jose, CA
    $106k-$148k(Glassdoor est.)
    10 days ago 10d
    Title: ASICPhysicalDesignEngineer Location: San Jose, CA WHO YOU'LL WORK WITH: Our creative and talented team as Physical… through physical synthesis and Place & Route tools and working with ASIC vendors. As member of physical/implementation design team…
  • 3.5
    Peregrine Semiconductor – Austin, TX
    7 days ago 7d
    individuals. This position focuses on the design of CMOS ASIC (Application Specific Integrated Circuits) for ultra… must have demonstrated experience in sensor ASIC system and circuit analysis, design, test, product development, and mass production…
  • Approgence – San Jose, CA
    $78k-$110k(Glassdoor est.)
    15 days ago 15d
    Job Title : ASICPhysicalDesignEngineer Job Location : San Diego & San Jose, CA Job Description : This person will… complete physicaldesign. He will identify physicaldesign issues in early stage, working with RTL engineer to fix. He will isolate…
  • 3.7
    Northrop Grumman – Morrisville, NC
    $105k-$153k(Glassdoor est.)
    8 days ago 8d
    Northrop Grumman Mission Systems (NGMS) is seeking an ASICPhysicalDesignEngineer to join our team of highly qualified, diverse individuals… responsible for back-end ASICDesign including physical place and route, synthesis, timing analysis, and physical verification. Successful…
  • 4.4
    NVIDIA – Santa Clara, CA
    $99k-$130k(Glassdoor est.)
    14 days ago 14d
    collaborating with other architects, ASICdesigners and verification engineers to design high frequency clocks. You should be… today. The GPU clocks group is looking for a top-notch ASICengineer to join the team. The Team is responsible for crafting all…
  • 4.0
    F5 Networks – United States
    $116k-$159k(Glassdoor est.)
    6 days ago 6d
    years of professional experience in design verification. BSEE or equivalent. Physical Demands and Work Environment: Duties… verification components in SystemVerilog UVM for complex designs. The DUT (Design Under Test) can be a block level module, where meticulousness…
  • 3.5
    Aricent – United States
    $60k-$80k(Glassdoor est.)
    NEW
    algorithms, ASICDesign, RTL Coding, JPEG, C/C++/SystemC, Modelsim, Synopsys DC, LEC, Spyglass) Physical Layer Design (PHY, USB… disciplines: SoC Design (ASIC integration, Peripherals, Bus Design, DC/PC, LINT, PTSI) RTL Design (Functional/Structural…
  • 4.2
    Asic North – Tempe, AZ
    $71k-$100k(Glassdoor est.)
    4 days ago 4d
    multiple facets of ASICdesign – RTL design, synthesis, design-for-test, static-timing-analysis, physicaldesign, and verification… support design methodologies for new Electronic Design Automation (EDA) tools and technologies. Experience with IBM ASIC methodologies…
  • 4.1
    ViaSat – Cleveland, OH
    $76k-$106k(Glassdoor est.)
    7 days ago 7d
    Job Title ASIC / FPGA DesignEngineer - Cleveland Job Responsibilities Are you a talented, motivated engineer looking for… communications problems, is looking for an exceptional ASIC/FPGA designengineer to join our team in developing next generation communication…
  • 3.5
    Advanced Micro Devices, Inc. – Sunnyvale, CA
    $103k-$141k(Glassdoor est.)
    Today 9hr
    Qualifications Education track for Electrical or Computer Engineering w/ focus on Computer/Graphics Architecture Must be proficient… ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/…
  • 4.2
    Silicon Labs – Austin, TX
    $105k-$141k(Glassdoor est.)
    NEW
    Knowledge of System-On-Chip or ASICdesign, and understanding of SoC or ASIC tools/flows Advanced design implementation skills: synthesis… the realization of that future. As a PhysicalDesignEngineer, you will work with our design team to define and deliver key flow…
  • 3.1
    Toshiba America Electronic Components – San Jose, CA
    $135k-$173k(Glassdoor est.)
    7 days ago 7d
    supporting ASIC, FPGA and Palladium platforms SoC level DFT and test structures for ATE working closely with ASIC Vendor Work… Responsibilities: Participate in the SSD Controller ASIC HW & FW specification development SoC top level integration…
  • 4.3
    SpaceX – Irvine, CA
    $153k-$199k(Glassdoor est.)
    21 days ago 21d
    Mars. PRINCIPAL DIGITAL ASICDESIGNENGINEER OVERVIEW: This is a principal digital ASICdesign role in the development of… principal digital ASICdesigner, you will be responsible for all aspects of digital ASICdesign focusing on RTL design, verification…
  • 5.0
    JobJuncture – Severn, VA
    $74k-$118k(Glassdoor est.)
    7 days ago 7d
    equivalent experience in Electrical Engineering or Computer Engineering with experience in FPGA/ASIC security.Previous publication,… strong experience in in Verilog/VHDL/C programming for FPGAs/ASICs required.Ability to address security threats and solutions at…
  • 3.7
    Intel – San Jose, CA
    $101k-$143k(Glassdoor est.)
    7 days ago 7d
    Job Description As a member of the ASIC Frontend Design and Integration team, you will be part of Intel's Programmable Solution… Solution Group PSG, working on complex ASIC and FPGA designs in leading edge process nodes. Responsibilities include the following…
  • 3.9
    Hepco – Baltimore, MD
    NEW
    contractor is seeking an ASIC Backend DesignEngineers. Physicaldesign of digital and mixed signal ASICdesigns targeting deep submicron… Design - physicaldesign of digital and mixed signal ASICdesigns targeting deep submicron foundry processes. Physicaldesign shall…
  • 3.1
    Toshiba America Electronic Components – San Jose, CA
    $139k-$178k(Glassdoor est.)
    NEW
    party IP's for SoC integation Drive SoC physicaldesign implementation with ASIC vendor Work closely with Verification, Validation… experience working with ASIC vendors or internal COT flow for physical implementation Must have experience in ASIC vendor management…
  • 3.7
    Lockheed Martin – Grand Prairie, TX
    $72k-$97k(Glassdoor est.)
    NEW
    Programmable Gate Array (FPGA) DesignEngineer for a position in Grand Prairie, TX. Digital Design encompasses the full life cycle… of electronic subsystems development. As such, the FPGA DesignEngineer will be responsible for: Development, integration…
  • 3.7
    Intel – San Jose, CA
    $94k-$130k(Glassdoor est.)
    1 days ago 21hr
    working on complex ASIC and FPGA designs in leading edge process nodes.Responsibilities include the following:* Design and integration… Architecture, Design Verification, PhysicalDesign, DFT, and power teams to achieve first tapeout success on designs* Work with cross-functional…
  • 4.3
    SpaceX – Irvine, CA
    $110k-$144k(Glassdoor est.)
    14 days ago 14d
    on Mars. SENIOR ASICDESIGNENGINEER RESPONSIBILITIES: As a Senior DesignEngineer youll help design, implement and verify… FPGAs and/or ASICs. Participate in the micro architecture and design partition within the ASIC/FPGA. Implement design blocks using…
  • 4.4
    NVIDIA – Santa Clara, CA
    NEW
    now looking for a Senior ASIC Power Engineer: NVIDIA is seeking extraordinary power engineers to design hardware accelerators… challenge? If so, we want to hear from you. Come, join our GPU ASIC team and help build the real-time, cost-effective computing platform…
  • 4.4
    Google – Madison, WI
    $79k-$113k(Glassdoor est.)
    7 days ago 7d
    experience in FPGA/ASICdesign and experience with ASIC development. Experience with highly pipelined designs, and with multiple-clock-domain… developing improvements in overall design. Design and document one or more blocks of an ASIC, including functionality and timing…
  • 3.5
    Aricent – United States
    1 days ago 1d
    MATLAB, modeling) Physical Layer Design (USB, HDMI, DDR, MIPI) Digital Design for Mixed Signal ASICs (PLL, Phase-Lock-Loop… Lead - RTL DesignEngineers: Job Description: 7+ years of industry experience in the following areas: · ASIC frontend development…
  • 3.5
    Cavium – San Jose, CA
    $90k-$117k(Glassdoor est.)
    Today 9hr
    You will work directly with senior members of the ASIC team to learn and design state of art high speed digital systems. Responsibilities… As a new graduate engineer, you would contribute as a designengineer developing the next-generation of multi-core processors.…
  • 2.8
    SK Hynix Memory Solutions – San Jose, CA
    $93k-$120k(Glassdoor est.)
    24 days ago 24d
    Descriptions: The ASICDesignEngineer will be working on the leading edge SSD controller IP design from architecture to production… support physicaldesign and system level analysis. Qualifications: BS, MS, or PhD in Electrical Engineering with 5-10…
  • 3.5
    Advanced Micro Devices, Inc. – Sunnyvale, CA
    $103k-$141k(Glassdoor est.)
    12 days ago 12d
    KEY RESPONSIBILITIES Work in a team of design verification and designengineers, involved in all aspects of the verification… REQUIREMENTS Required: Bachelor's, Computer Engineering and/or Electrical Engineering Requisition Number: 43836 Country…
  • 3.5
    Cavium – Marlborough, MA
    $74k-$104k(Glassdoor est.)
    NEW
    with a quality design. Key Qualifications: This position requires thorough knowledge of the ASICdesign flow. The… 5+ years of experience in ASICdesign flow Proven track record of high performance designs in high volume production Proven…
  • 4.3
    SpaceX – Irvine, CA
    $103k-$143k(Glassdoor est.)
    NEW
    verification Engineer youll help define the verification methodology for the complex ASICs and FPGAs. You will design and implement… Degree in computer engineering or electrical engineering. 8+ years of experience verifying complex ASICs / FPGAs. 5+ years of…
  • 3.4
    Panasonic Avionics Corporation – Cupertino, CA
    4 days ago 4d
    a Staff Analog/Mixed-Signal IC designengineer for an exciting opportunity to develop an ASIC within state-of-the-art next generation… routinely interface with PDSLM's MEMS designers to contribute at the system level (MEMS + ASIC). The candidate should be a self-motivated…
  • 3.7
    Acacia Communications – Maynard, MA
    $77k-$108k(Glassdoor est.)
    NEW
    Manager, ASIC Verification Location: Maynard, MA FLSA Status: Exempt Job Description: The ASICDesign Verification… large, highly complex ASICs that are used in these next generation telecom systems. This engineer must be able to operate…
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