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ASIC Physical Design Engineer Jobs

304 Jobs

  • 4.0
    Apple – Santa Clara, CA
    $112k-$156k(Glassdoor est.)
    HOT
    ASICDesign Integration Engineer Job Number: 52280683 Santa Clara Valley, California, United States Posted: Oct. 2, 2017… quality design. Key Qualifications This position requires thorough knowledge of the ASICdesign flow, FE and Design verification…
  • 4.0
    Apple – Santa Clara, CA
    $106k-$144k(Glassdoor est.)
    NEW
    quality design. Key Qualifications This position requires thorough knowledge of the ASICdesign flow, FE and Design verification… least 5+ years experience in ASICdesign flow •Proven track record of high performance designs in high volume production for…
  • 4.4
    Space Exploration Technologies – Irvine, CA
    $158k-$206k(Glassdoor est.)
    21 days ago 21d
    PRINCIPAL DIGITAL ASICDESIGNENGINEER OVERVIEW: This is a principal digital ASICdesign role in the development… principal digital ASICdesigner, you will be responsible for all aspects of digital ASICdesign focusing on RTL design, verification…
  • 4.4
    Google – Mountain View, CA
    $127k-$173k(Glassdoor est.)
    NEW
    expert, you will design and optimize image processing algorithms and convert them into power efficient ASIC solutions using the… verification, physicaldesign, power optimization). Interest in consumer cameras and photography. Knowledge of hardware design paradigms…
  • 3.7
    Qualcomm Incorporated – San Diego, CA
    $187k-$246k(Glassdoor est.)
    NEW
    entire COT flow including digital design, verification, synthesis, DFT, and physicaldesign using state of the art process nodes… Requirements Required: Bachelors, Electrical Engineering Preferred: Masters, Electrical Engineering
  • 3.5
    Micron – Minneapolis, MN
    $86k-$120k(Glassdoor est.)
    6 days ago 6d
    Req. ID: 98481 As an ASICDesignEngineer at Micron in Minneapolis, Minnesota, you will develop new memory system technology… development of ASIC based products by assisting with the overall conception, design and optimization of digital and analog ASIC circuits…
  • 3.7
    NSA – Fort Meade, MD
    HOT
    circuits (e.g., FPGAs, ASICs) Microelectronics designengineering including analog or digital logic design is desired. Experience… Microelectronics DesignEngineers' areas of responsibility can include: Application Specific Integrated Circuit (ASIC) and Field…
  • 3.5
    Advanced Micro Devices, Inc. – Boxborough, MA
    $102k-$138k(Glassdoor est.)
    7 days ago 7d
    BSEE or equivalent degree and 2+ years of ASIC DFT experience. Understanding of Design For Test methodologies and DFT verification… the front-end design/integration team, you will work closely with the architecture, IP design, PhysicalDesign teams, and product…
  • 3.7
    Lockheed Martin – Grand Prairie, TX
    $124k-$163k(Glassdoor est.)
    6 days ago 6d
    Programmable Gate Array (FPGA) DesignEngineer for a position in Grand Prairie, TX. Digital Design encompasses the full life cycle… of electronic subsystems development. As such, the FPGA DesignEngineer will be responsible for: Development, integration…
  • 3.5
    Mellanox Technologies – Westborough, MA
    22 days ago 22d
    libraries Execute a complete engineering process, including refining requirements, engineeringdesign of data structures/algorithms… others) Well-rounded engineering skills, including technical investigation, design, software engineering process, schedule development…
  • 3.5
    Cavium, Inc. – San Jose, CA
    $87k-$113k(Glassdoor est.)
    NEW
    You will work directly with senior members of the ASIC team to learn and design state of art high speed digital systems. Responsibilities… As a new graduate engineer, you would contribute as a designengineer developing the next-generation of multi-core processors.…
  • 4.0
    Apple – Santa Clara, CA
    $127k-$171k(Glassdoor est.)
    19 days ago 19d
    Senior ASICDesignEngineer - Fabric Job Number: 52464960 Santa Clara Valley, California, United States Posted: Nov. 28… position requires thorough knowledge of the ASICdesign flow, front end RTL coding and Design verification, synthesis, scripting and…
  • 3.8
    Meridian Technology – Irvine, CA
    $88k-$136k(Glassdoor est.)
    HOT
    Meridian Technology Group is seeking Software Engineers - ASIC Verification Engineers. Due to ITAR requirements, only US Citizens… eligible for consideration. Our client is in need of ASIC Verification Engineers with a wide variety of advanced verification tasks…
  • 4.4
    SpaceX – Redmond, WA
    $94k-$135k(Glassdoor est.)
    7 days ago 7d
    Verification Engineer youll help define write the test harness to verify complex ASICs and FPGAs. You will design and implement… Mars. FPGA / ASIC VERIFICATION ENGINEER RESPONSIBILITIES: We are looking to hire a Verification Engineer with hands-on…
  • 4.4
    SpaceX – Redmond, WA
    $117k-$161k(Glassdoor est.)
    7 days ago 7d
    on Mars. FPGA / ASICDesignEngineer Responsibilities: As a DesignEngineer youll help design, implement and verify… FPGAs and/or ASICs. Participate in the micro architecture and design partition within the ASIC/FPGA. Implement design blocks using…
  • 4.4
    SpaceX – Redmond, WA
    $168k-$229k(Glassdoor est.)
    7 days ago 7d
    Masters degree in engineering or math. ASIC / FPGA / SoC System integration experience. Strong Silicon/ASICdesign experience. One… enabling human life on Mars. PRINCIPAL ASICENGINEER RESPONSIBILITIES: Implement ASIC / SoCs / FPGAs for multiple products…
  • 3.7
    Juniper Networks – United States
    $96k-$124k(Glassdoor est.)
    20 days ago 20d
    ) seeks ASICDesignEngineers to develop next generation of ASICs for new core routers, switches, and firewalls. Opportunity… Job Title: ASICDesignEngineer Staff Location: Sunnyvale, CA Organization: Silicon Systems Technology Group (SST)…
  • 3.5
    Advanced Micro Devices, Inc. – Orlando, FL
    $90k-$123k(Glassdoor est.)
    NEW
    Qualifications Education track for Electrical or Computer Engineering w/ focus on Computer/Graphics Architecture Must be proficient… Modeling (C / C++) Collaborate with Graphics Architects and Design&Verification Team to coordinate, participate in, new feature…
  • 4.3
    NVIDIA – Santa Clara, CA
    $134k-$177k(Glassdoor est.)
    21 days ago 21d
    looking for a Senior ASIC Floorplan DesignEngineer: NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement… routing congestion issues with physical and ASICdesign teams by influencing early design and physical implementation decisions.…
  • 3.9
    Oceanit – Honolulu, HI
    $78k-$117k(Glassdoor est.)
    4 days ago 4d
    Signal Integrated Circuit DesignEngineer to work with a team of engineers to develop new ASICdesigns including infrared readout… integrated circuit design experience, this position may be the one for you! THE VALUE YOU DELIVER: Define ASIC specifications…
  • 3.5
    Advanced Micro Devices, Inc. – Santa Clara, CA
    $107k-$145k(Glassdoor est.)
    NEW
    RESPONSIBILITIES: Working on ASIC DFT/DFX IP design Developing IP automation flow Working on RTL design Working on block… development JOB COMPLEXITY: Proficient in RTL design Experience with ASIC front end integration flow Excellent written…
  • 3.5
    Panasonic North America – United States
    12 days ago 12d
    a Staff Analog/Mixed-Signal IC designengineer for an exciting opportunity to develop an ASIC within state-of-the-art next generation… routinely interface with PDSLM’s MEMS designers to contribute at the system level (MEMS + ASIC). The candidate should be a self-motivated…
  • 3.7
    Qualcomm – San Jose, CA
    $105k-$135k(Glassdoor est.)
    6 days ago 6d
    Job Id E1957027 Job Title Low-power ASICDesignengineer - Wi-Fi IoT Post Date 08/03/2017 Company Division… silicon bringup/debug of ASICdesigns" id="hdnMinimumQualifications">- 3+ yrs Experience in low-power design. Hardware description…
  • 3.2
    Toshiba America Electronic Components – San Jose, CA
    EASY APPLY
    $142k-$182k(Glassdoor est.)
    5 days ago 5d
    controller's design specification, RTL design, performance analysis, FW interactions as well as frontend physical implementation… Enterprise SSD requirements Participate in the SSD Controller ASIC HW & FW specification development Implementation of Flash controller…
  • Approgence – San Jose, CA
    $88k-$118k(Glassdoor est.)
    19 days ago 19d
    perform bit-exact simulation. Modem ASICDesign team is working with physicaldesignengineer to deliver netlist, spec timing constraints… Job Title : Senior ASIC/ RTL DesignEngineer Job Location : San Diego & San Jose, CA Job Description : This is a…
  • 4.4
    SpaceX – Irvine, CA
    $116k-$163k(Glassdoor est.)
    17 days ago 17d
    ultimate goal of enabling human life on Mars. LEAD ASIC VERIFICATION ENGINEER OVERVIEW: This position requires technical project… must have experience leading several ASIC verification efforts with team sizes of 3 engineers or larger. The candidate must have…
  • 4.6
    TargetCW – San Jose, CA
    EASY APPLY
    $115k-$165k(Glassdoor est.)
    14 days ago 14d
    or Computer Engineering, graduate level or compensating experience. o Proven success in development of complex ASIC, FPGAs and… and products. o Demonstrated capability to design major blocks involving ASIC, IPs, logic, and FPGAs. #DI…
  • 3.7
    Impinj – Seattle, WA
    $61k-$92k(Glassdoor est.)
    8 days ago 8d
    and simulate design enhancements, and validate product performance in the laboratory Lead and implement FPGA or ASIC based digital… skills Desirable Qualifications Work experience designing FPGA or ASIC products Impinj is a fantastic place to work. We'…
  • 4.4
    Space Exploration Technologies – Irvine, CA
    $106k-$147k(Glassdoor est.)
    19 days ago 19d
    verification Engineer you'll help define the verification methodology for the complex ASICs and FPGAs. You will design and implement… Mars. SENIOR ASIC/FPGA VERIFICATION ENGINEER We are looking to hire a Senior Verification Engineer with hands-on experience…
  • 3.4
    BAE Systems – Manassas, VA
    $65k-$92k(Glassdoor est.)
    NEW
    insertion, synthesis, timing analysis, and physicaldesign as well as post fabrication ASIC first article bring-up. In this position… Synthesis Static Timing Analysis Test pattern generation PhysicalDesignASIC hardware test bring-up About BAE Systems Intelligence…
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