ASIC Verification Engineer Jobs | Glassdoor
  • All Jobs (722)

ASIC Verification Engineer Jobs

Filters
Filters
  • 3.5
    Microchip Technology – San Jose, CA
    Est. Salary $59k-$83k
    9 days ago 9d
    and Networking design at Microchip. As part of our seasoned ASIC design team, you will work on USB and networking communication… Job Requirements BS/MS in Electrical or Computer Engineering, with coursework in the following areas: Microelectronic…
  • 4.6
    Macropace Technologies – Mountain View, CA
    Est. Salary $77k-$107k
    4 days ago 4d
    ASIC Verification Engineer Mountain View, CA Full Time Position Job Description: Good communication and interpersonal… Makefiles, Perl scripting a must Chip/full system level ASIC Verification skills, and debug skills a must Debug using waveforms…
  • 3.2
    Hewlett Packard Enterprise – Roseville, CA
    Est. Salary $93k-$129k
    23 days ago 23d
    Digital Design ASIC Verification Engineer(Graduate Program) Job Description: Hewlett Packard Enterprise We Are In… art in performance and scale of verification Collaborate closely with a peers and engineers from several disciplines Deliver…
  • 4.0
    VeriSilicon Holdings Co., Ltd. – San Jose, CA
    EASY APPLY
    Est. Salary $91k-$121k
    1 days ago 17hr
    skills in Verilog Must be familiar with all stages of the ASIC design flow (including specification, architecture, and design… micro-architecture, implementation (using Verilog), and verification. Expected skills: 5+ years hands-on experience with…
  • 3.7
    Infinera – Sunnyvale, CA
    Est. Salary $112k-$152k
    22 days ago 22d
    development and execution of self-checking tests for complex digital ASICs. Infinera is an equal opportunity employer. All qualified… * Contribute significantly to verification infrastructure development. * Development of System Verilog/UVM based protocol/traffic…
  • 3.5
    Broadcom – San Jose, CA
    Est. Salary $101k-$134k
    2 days ago 2d
    a strong and expert level ASIC Verification Engineer in the area of PCIe SSD Controller verification working with the latest, greatest… / SoC verification using UVM, OVM or System Verilog. - Expertise in developing block level / system level verification environments…
  • 4.3
    NVIDIA – Santa Clara, CA
    Est. Salary $138k-$185k
    4 days ago 4d
    responsible for verification of the ASIC design, architecture, golden models and micro-architecture using advanced verification methodologies… We're now looking for a Senior ASIC Verification Engineer:Nvidia’s invention of the GPU 1999 sparked the growth of the PC gaming…
  • 3.4
    Cavium, Inc. – Aliso Viejo, CA
    Est. Salary $93k-$129k
    15 days ago 15d
    responsibilities: Join a verification team responsible for the verification of state of the art networking ASIC designs. As part of… full-chip benches, formal verification and many more. Required Skills: Must have experience in ASIC Verification using one of the following…
  • 2.9
    Posh Consulting – Redmond, WA
    7 days ago 7d
    Title – ASIC Verification Engineer Location – Mountain View, CA Skill set: Verilog and C/C++ coding a must Make… files, Perl scripting a must Chip/full system level ASIC Verification skills, and debug skills a must Debug using waveforms…
  • 3.6
    BTI Systems – United States
    Est. Salary $64k-$90k
    11 days ago 11d
    About the Position: We are looking to hire ASIC Verification Engineers with excellent communication and leadership skills. You… deliver verification suites/tests for ASICs that enable faster, denser, feature-rich systems. Write complete verification plan independently…
  • 3.0
    PROMEDIA TELECOM – Tempe, AZ
    Est. Salary $66k-$92k
    6 days ago 6d
    mixed signal ASICs for IoT, automotive, and audio applications. We are looking for a motivated Verification Engineer to take on… design verification experience. Candidates are expected to have experience with: ++ Verilog and SystemVerilog ++ ASIC or FPGA…
  • 4.3
    Embedded Resource Group, Inc. – San Jose, CA
    16 days ago 16d
    ASIC Verification Engineer ASIC verification for SSD controller System-on-Chip. Participate in definition and the deployment… Required Skills: • 3-10 years experience in ASIC verification • UVM and SystemVerilog Desired Skills: • PCIe or…
  • 3.8
    MIT Lincoln Laboratory – Lexington, MA
    Est. Salary $89k-$126k
    1 days ago 1d
    Imager Technology Group is seeking to hire an ASIC design and verification engineer to assist in the development of next generation… will have experience in all phases of an ASIC design flow including design, verification, synthesis, static timing, DFT, and layout…
  • 4.4
    SpaceX – Redmond, WA
    Est. Salary $88k-$125k
    18 days ago 18d
    on Mars. FPGA / ASIC VERIFICATION ENGINEER RESPONSIBILITIES: We are looking to hire a Verification Engineer with hands-on test… leadership skills. As a Verification Engineer youll help define write the test harness to verify complex ASICs and FPGAs. You will…
  • 4.4
    Technology Search International – Santa Clara, CA
    Est. Salary $87k-$121k
    4 days ago 4d
    Opportunity for an experienced ASIC Verification Engineer who has experience with SoCs and ASICs and verifying data center & communication… really fantastic highly programmable ASICs. Requirements: 8+ years of ASIC / SoC Verification experience with SV/UVM environments…
  • 3.3
    Micron – Minneapolis, MN
    Est. Salary $70k-$102k
    23 days ago 23d
    Req Id: 78662 As an ASIC Verification Engineer in Micron’s Advanced Memory Solutions group, you will utilize and develop UVM… UVM based verification infrastructure while verifying large complex transaction based ASICs. Typical tasks include the development…
  • 4.4
    SpaceX – Irvine, CA
    Est. Salary $112k-$155k
    11 days ago 11d
    ultimate goal of enabling human life on Mars. LEAD ASIC VERIFICATION ENGINEER OVERVIEW: This position requires technical project… must have experience leading several ASIC verification efforts with team sizes of 3 engineers or larger. The candidate must have…
  • 4.4
    Google – Mountain View, CA
    Est. Salary $97k-$122k
    22 days ago 22d
    interacting with design engineers to identify important verification scenarios. Create a constrained-random verification environment using… with design engineers to deliver functionally correct design blocks. Close coverage measures to identify verification holes and…
  • 4.1
    Asic North – Austin, TX
    Est. Salary $76k-$105k
    23 days ago 23d
    facets of ASIC design – RTL design, synthesis, design-for-test, static-timing-analysis, physical design, and verification. Ability… Automation (EDA) tools and technologies. Experience with IBM ASIC methodologies is preferred. SKILLS NEEDED: 5+ years of…
  • 3.3
    Micron – Minneapolis, MN
    Est. Salary $80k-$115k
    14 days ago 14d
    Senior ASIC Verification Engineer in Micron’s Advanced Memory Solutions group, you lead the development UVM based verification infrastructure… transaction based ASICs. Typical tasks include; the development of new environments, execution of verification plans while interfacing…
  • 3.3
    HGST – Milpitas, CA
    23 days ago 23d
    documents, develop the ASIC Master Verification plan. · Collect and report verification coverage meeting specific coverage and milestone… and development of SSD ASIC verification strategies including appropriate state of the art verification techniques · Support the…
  • FirstPass Engineering – Denver, CO
    Est. Salary $59k-$84k
    30+ days ago 30d+
    Electrical Engineering, Computer Engineering, or Computer Science with two to five years of experience in the verification of ASIC/IC… experiences would be a plus: ASIC design experience Use of a high-level language for verification, such as SystemVerilog C++,…
  • Technical-Link N. America – San Diego, CA
    Est. Salary $113k-$157k
    30+ days ago 30d+
    Description Must Possess Skills 10+ years of SoC / Chip level verification Proficient in the UVM methodology and System Verilog Proficient… and CSH Experience in developing reusable / hierarchical verification environments Experience in developing UVM environments from…
  • 3.5
    Redolent, Inc – Santa Clara, CA
    EASY APPLY
    2 days ago 2d
    requirement with our direct client: Title: Specman Engineer (ASIC Verification) Location: Santa Clara, CA Duration: 6+ months… At least 5+ Yr hands-on ASIC verification experience; Wireless communication/DSP chip verification experience is must; Hands-on…
  • 4.0
    Sandia National Laboratories – Albuquerque, NM
    Est. Salary $143k-$214k
    7 days ago 7d
    microcontrollers Microprocessors Verilog and VHDL FPGAs, and ASICs Wafer probing and test Cryptographic implementations and… degree in Electrical Engineering, Mechanical Engineering, Material Science, Computer Science, Computer Engineering or other relevant…
  • 4.3
    Embedded Resource Group, Inc. – Mountain View, CA
    14 days ago 14d
    ASIC/FPGA Design Verification Engineer Seeking design verification engineer for verification of FPGA design. Required… Required Skills: • ASIC or FPGA design verification • At least 2 + UVM projects in past • System Verilog • Scripting – Ruby, Perl…
  • FirstPass Engineering – Phoenix, AZ
    Est. Salary $65k-$90k
    30+ days ago 30d+
    Electrical Engineering, Computer Engineering, or Computer Science with five to ten years of experience in the verification of ASIC/IC… it be designing in the latest ASIC/FPGA technology or utilizing the most advanced verification methods to assure that a customer's…
  • 3.8
    Juniper Networks – United States
    Est. Salary $96k-$148k
    12 days ago 12d
    About the Position: We are looking to hire ASIC Verification Engineers with excellent communication and leadership skills. You… deliver verification suites/tests for ASICs that enable faster, denser, feature-rich systems. Write complete verification plan independently…
  • 3.0
    Innovative Logic Inc. – San Jose, CA
    Est. Salary $92k-$125k
    4 days ago 4d
    We are looking for UVM Verification engineer with the followings skills. You have to spend most of the time writing test benches… Systemverilog, UVM, cverilog Good undestanding of new verification concepts Nice to Have o ARM SOC knowledge, AHP, APB…
  • 2.9
    Western Digital – Irvine, CA
    Est. Salary $73k-$101k
    15 days ago 15d
    Engineer will be responsible for verification of both old and new IP. Will be involved in architectural feature discussions… architecture. Work along-side the design team and with other verification engineers in a collaborative environment to create a high quality…
  • 3.0
    Toshiba – San Jose, CA
    Est. Salary $66k-$92k
    30+ days ago 30d+
    will own the whole or parts of sub modules verification and/or full chip verification in SSD controllers. Such modules are SATA… controllers. Define and develop verification architecture and methodology Writing verification plans, tests, and building random…
Page 1 of 24
Be the first to get new jobs like these: