Senior ASIC Physical Design Engineer Jobs in Bengaluru | Glassdoor
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Senior ASIC Physical Design Engineer Jobs in Bengaluru

29 Jobs

  • 4.4
    NVIDIA – Bengaluru
    9 days ago 9d
    SENIORASICENGINEER - DESIGNSENIOR ASICENGINEER - DESIGN # 1901030 As a member of our ASIC backend/timing team, you'll… : BS or MS in Electrical Engineering or Computer Science 5+ years of relevant ASICdesign experience ideally with a focus…
  • 4.2
    Computer Power Group Private Limited – Bengaluru
    7 days ago 7d
    timely releaseInterface with Design Engrs to provide feedback and implement enhancements to ensure design correctness and robustness…
  • 3.1
    MaxLinear Inc. – Bengaluru
    13 days ago 13d
    multimillion gate SoC designs in cutting edge process technologies (40nm, 28nm, 16nm, …) All aspects of PhysicalDesign including Floor… B. Tech / M. Tech with 5 to 7 years of experience in PhysicalDesign Company Overview MaxLinear is a global, New York…
  • 3.7
    Intel – Bengaluru
    12 days ago 12d
    Description Job Description: In this role, the Senior Digital Physical IC DesignEngineer will be part of team contributing to Silicon… flows and physicaldesign verification flows is requiredFamiliar with various process related design issues including Design for Yield…
  • 4.4
    Nvidia Corporation – Bengaluru
    7 days ago 7d
    SENIORASICENGINEER -DESIGNSENIOR ASICENGINEER -DESIGN # 1901030As a member of our ASIC backend/timing team, you' -ll be… REQUIREMENTS: - BS or MS in Electrical Engineering or Computer Science - 5+ years of relevant ASICdesign experience ideally with a focus…
  • 3.8
    Magma Design – Bengaluru
    NEW
    Physical DesignEngineerSenior II” is a Design Implementation Engineer who will perform the PhysicalDesign activity to harden Synopsys… Business Title ASICPhysicalDesign Engr, Sr II Requisition Number 14741BR Hiring Location(s) INDIA - Bangalore Job…
  • 3.7
    Intel – Bengaluru
    12 days ago 12d
    through various phases of the ASIC/SOC digital design process - Product definition, Architecture, RTL design using Verilog, system Verilog… networking space. As seniorEngineer, the individual will be involved in developing key digital & mixed signal designs from architecture…
  • 3.6
    Microchip Technology – Bengaluru
    6 days ago 6d
    Work with Synthesis, STA, DFT, APR and Layout engineers to resolve physicaldesign issues for floor-planning and final sign off…   Experience: 8-12 years of experience in ASIC/ SoC / FPGA Design.   Job Responsibilities: Technical lead to…
  • 3.2
    Applied Micro – Bengaluru
    7 days ago 7d
    DescriptionStaff-Senior Staff-Layout Integration/Layout Design/ Physical Verification EngineerExperienced senior level mask designer, specializing… Band-gap reference etc.÷ Working knowledge of layout design and physical verification tools - Cadence Virtuoso layout suite, Calibre…
  • 3.1
    MaxLinear Inc. – Bengaluru
    11 days ago 11d
    this role, an ASIC Verification Senior Manager / Technical Lead in the ASIC group will lead the verification team, drive the verification… development, provides technical guidance to the team, Leads ASIC Verification team. Coaches team members, hires and retains best…
  • 3.6
    Microchip Technology – Bengaluru
    6 days ago 6d
    optimization, static timing analysis, and design verification using an industry leading ASICdesign flow. It will require a proactive… SoC development. Work closely with digital, analog, and physicaldesign teams to optimize front-end (RTL-to-Netlist) implementation…
  • 4.4
    NVIDIA Corporation – Bengaluru
    7 days ago 7d
    SeniorPhysicalDesign EngineerResponsible for all aspects of physicaldesign and implementation of GPU and other ASICs targetedat… large VLSI physicaldesign implementation on 40nm, 28nm or 20nm technologySuccessful track record of delivering designs to production…
  • 4.6
    Live Connections – Bengaluru
    7 days ago 7d
    package designs, using Mentor Xpedition for physicaldesign and tape out. The responsibilities include:-Working with Senior Package… EngineerJob DescriptionJob Description: The engineer is responsible for the physicaldesign of high density package substrates for Intel…
  • 3.2
    Applied Micro – Bengaluru
    7 days ago 7d
    DescriptionStaff-Senior Staff-Layout Integration/Layout Design/ Physical Verification EngineerExperienced senior level mask designer, specializing… Band-gap reference etc.÷ Working knowledge of layout design and physical verification tools - Cadence Virtuoso layout suite, Calibre…
  • 4.0
    Mentor Graphics – Bengaluru
    19 days ago 19d
    phases in the physicaldesign flow for large multimillion ASICs. • Knowledge in Static Timing Analysis, design/tool debug, fixing… experience in PhysicalDesign implementation domain of VLSI. Technical skills: • Work experience in PhysicalDesign implementation…
  • 3.0
    Cyient Limited – Bengaluru
    7 days ago 7d
    Synopsys or Magma PhysicalDesign Tools. Expertise in scripting languages such as PERL, TCL strong physical verification skill… Primetime-SI. Desired skills- Expertise in full chip physicaldesign. Low Power Design - Voltage islands, power gating, substrate-bias…
  • 3.6
    Microchip Technology – Bengaluru
    15 days ago 15d
    controller design at Microchip - the world’s leading embedded controller solutions supplier. As part of our seasoned ASIC team, you… Interact with physicaldesigners on IP and chip level layout along with reviewing DRC, ERC and LVS reports. Design documentation…
  • Mulya Technologies – Bengaluru
    7 days ago 7d
    and hierarchical designs. Co-ordinate the full chip physicaldesign and verification activities. Physicaldesign verification tasks… Tree Synthesis Application-Specific Integrated Circuits (ASIC) Design Rule Checking (DRC) Layout Versus Schematic (LVS) TCL Very-Large-Scale…
  • 3.5
    Anlage Infotech India Private Limited – Bengaluru
    7 days ago 7d
    package designs, using Mentor Xpedition for physicaldesign and tape out. The responsibilities include:-Working with Senior Package… EngineerJob DescriptionJob Description: The engineer is responsible for the physicaldesign of high density package substrates for Intel…
  • 3.2
    Cypress Semiconductor – Bengaluru
    27 days ago 27d
    origin, physical or mental disability, or status as a Protected Veteran Job Segment: Front End, Design Engineer… Job Description Sr DesignEngineer who is responsible for the design and development of electronic circuits. Responsibilities…
  • Mulya Technologies – Bengaluru
    7 days ago 7d
    and hierarchical designs. Co-ordinate the full chip physicaldesign and verification activities. Physicaldesign verification tasks… Tree Synthesis Application-Specific Integrated Circuits (ASIC) Design Rule Checking (DRC) Layout Versus Schematic (LVS) TCL Very-Large-Scale…
  • 3.0
    New Era India Consultancy Private Ltd – Bengaluru
    7 days ago 7d
    package designs, using Mentor Xpedition for physicaldesign and tape out. The responsibilities include:-Working with Senior Package… EngineerJob DescriptionJob Description: The engineer is responsible for the physicaldesign of high density package substrates for Intel…
  • 4.0
    Open-Silicon – Bengaluru
    EASY APPLY
    8 days ago 8d
    and hierarchical designs. Co-ordinate the full chip physicaldesign and verification activities. Physicaldesign verification tasks… years No of Opening: 2 Job Description: Lead physicaldesign and physicaldesign verification tasks across the various projects…
  • 3.4
    Achronix Semiconductor – Bengaluru
    8 days ago 8d
    The employee is responsible for complete physicaldesign of large and complex ASIC and FPGA blocks. The employee is expected… Profile Name: SeniorDesignEngineer Type of Position: Regular, Exempt Reports to: Manager, Hardware Engineering Location…
  • 3.2
    Cypress Semiconductor – Bengaluru
    12 days ago 12d
    technologies. Candidate should be familiar with basic ASICphysicaldesign flow: LEF generation, Place & Route & understanding of… origin, physical or mental disability, or status as a Protected Veteran Job Segment: DesignEngineer, Engineering…
  • Mulya Technologies – Bengaluru
    7 days ago 7d
    and hierarchical designs. Co-ordinate the full chip physicaldesign and verification activities. Physicaldesign verification tasks… Tree Synthesis Application-Specific Integrated Circuits (ASIC) Design Rule Checking (DRC) Layout Versus Schematic (LVS) TCL Very-Large-Scale…
  • 3.4
    Achronix Semiconductor – Bengaluru
    8 days ago 8d
    Profile Name: SeniorDesignEngineer Type of Position: Regular, Exempt Reports to: Manager, Hardware Engineering Location… and complex ASIC and FPGA blocks. The employee is expected to take independent ownership of reasonably complex design challenges…
  • Mulya Technologies – Bengaluru
    7 days ago 7d
    JOB TITLE: LEAD /SeniorASICDESIGNENGINEERS – STA Location: Bangalore, India.Minimum Educational Qualifications: B.Tech/MasterÃ… Skills and ExperienceSTA, "Static Timing Analysis", SSTA, "physicalDesign", DFT, PrimeTime, "Prime Time", Tempus, PT, PTSI, Synthesis…
  • Mulya Technologies – Bengaluru
    7 days ago 7d
    JOB TITLE: FUNCTIONAL LEADS / LEADS / SeniorASICDESIGNENGINEERS – STA Location: Bangalore, India.Minimum Educational Qualifications… Skills and ExperienceSTA, "Static Timing Analysis", SSTA, "physicalDesign", DFT, PrimeTime, "Prime Time", Tempus, PT, PTSI, Synthesis…
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