Verification Engineer Jobs in Cupertino, CA | Glassdoor

Verification Engineer Jobs in Cupertino, CA

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  • 3.9
    Apple Inc. – Cupertino, CA
    Est. Salary $110k-$151k
    4 days ago 4d
    As a member of design verification team, you will have the responsibility for construction of verification environment and coding… experience with Analog Assertion Based Verification ••Basic design background to analysis verification results ••Knowledge UVM-AMS is…
  • Cadence – San Jose, CA
    Est. Salary $97k-$131k
    7 days ago 7d
    support implementation processor verification components. As a member of the design verification team for Xtensa processors, responsible… level, Chip level, and Block level verification and test bench development * Verification of network processors, CPU processor…
  • 3.9
    It Trailblazers – San Jose, CA
    Est. Salary $83k-$115k
    8 days ago 8d
    in total is required UVM Verification methodology experience PCIexpress and Ethernet Verification experience is mandatory DDR…
  • 4.3
    NVIDIA – Santa Clara, CA
    Est. Salary $137k-$185k
    10 days ago 10d
    now looking for a Sr ASIC Verification Engineer: NVIDIA is seeking elite ASIC Verification Engineers to verify the design and implementation… see: BS in Electrical Engineering or Computer Science or ECE or related degree. 5+ years or relevant work or lab experience You…
  • 3.9
    Axelon, Inc. – San Jose, CA
    Est. Salary $87k-$121k
    8 days ago 8d
    Job Title: Verification Engineer General Description Vision: Drive the functional verification of a new architecture GPU's… environments. Experience Requirements: Experienced with verification methodology such UVM/VMM/OVM. UVM is preferred. Successfully…
  • 3.9
    Apple – Santa Clara, CA
    Est. Salary $110k-$151k
    5 days ago 5d
    align with the project goals plus support cross-functional engineering efforts. Education MSEE or MSCE…
  • 4.4
    Google – Mountain View, CA
    Est. Salary $97k-$121k
    19 days ago 19d
    interacting with design engineers to identify important verification scenarios. Create a constrained-random verification environment using… with design engineers to deliver functionally correct design blocks. Close coverage measures to identify verification holes and…
  • 4.3
    NVIDIA – Santa Clara, CA
    Est. Salary $137k-$185k
    11 days ago 11d
    Responsible for verification of design, architecture, golden models and micro-architecture using advanced verification methodologies… the design and implementation, define the verification scope, develop the verification infrastructure (Transactors, Testbenches,…
  • 4.0
    Ambarella – Santa Clara, CA
    Est. Salary $84k-$117k
    18 days ago 18d
    languages. Develop verification tools. Perform coverage analysis using CAD tools. Perform system-level verification of Ambarella’s… Video Input block as well as other blocks. Perform Block Verification of Ambarella’s very complex CABAC compression block. Requirements…
  • 3.6
    Intel – San Jose, CA
    Est. Salary $92k-$126k
    8 days ago 8d
    , or Computer Engineering - 10+ years of hands-on experience and a track-record of success in logic verification. 5 years of experience… Debugging failures to root causeMaintaining and enhancing the verification infrastructure by creating new tools to support validation.The…
  • 4.3
    NVIDIA – Santa Clara, CA
    Est. Salary $137k-$185k
    1 days ago 1d
    responsible for verification of the ASIC design, architecture, golden models and micro-architecture using advanced verification methodologies… the design and implementation, define the verification scope, develop the verification infrastructure and verify the correctness…
  • 3.9
    Apple – Santa Clara, CA
    Est. Salary $118k-$147k
    10 days ago 10d
    Design Verification Engineer Job Number: 56937942 Santa Clara Valley, California, United States Posted: Apr. 12, 2017 Weekly… pre-silicon verification including but not limited to: establishing DV methodology, test-plan development, verification environment…
  • 4.4
    Google – Mountain View, CA
    Est. Salary $99k-$136k
    3 days ago 3d
    people's lives by transforming mobility. As a Digital Verification Engineer, you will leverage your strong technical background… failure debug. Create verification infrastructure and tools. Identify and integrate third-party verification IP. Collect and analyze…
  • 3.8
    Global Technology Associates – Santa Clara, CA
    Est. Salary $71k-$98k
    6 days ago 6d
    GTA is a leading independent provider of high-value engineering, technology and business consulting services to the telecommunications… Reliability) using Intel proprietary tools and flows Formal Verification using Conformal-LEC Implement Layout changes and ECOs…
  • 3.9
    Apple – Santa Clara, CA
    Est. Salary $146k-$181k
    8 days ago 8d
    Develop verification methodology suitable for the IP, ensuring scalable and portable environment Develop verification environment… trackers, coverage Develop verification plans for all features under your care Execute verification plans, including design bring-up…
  • 3.2
    Samsung Semiconductor, Inc. – San Jose, CA
    Est. Salary $78k-$108k
    12 days ago 12d
    JOB TITLE GPU MemSys Verification Engineer Requisition ID DSA31078 OVERVIEW Samsung Semiconductor Inc. is… memory system verification team. REQUIRED SKILLS Experience Requirements: Experienced with verification methodology…
  • 3.3
    Altera – San Jose, CA
    Est. Salary $114k-$144k
    18 days ago 18d
    Intel (PSG) is looking for an experienced Design Verification Engineer to verify PCIe or Ethernet Protocol IP. You will be part… integration of verification environment components utilizing UVM/SystemVerilog Testbench Development Creating Verification/Test plans…
  • 3.2
    Samsung Semiconductor, Inc. – San Jose, CA
    Est. Salary $78k-$108k
    19 days ago 19d
    JOB TITLE GPU Graphics Hardware Verification Engineer Requisition ID DSA31024 OVERVIEW Samsung Semiconductor… to join our team in San Jose, CA in the areas of Design Verification targeting our new Samsung GPU. The new GPU will be deployed…
  • 3.3
    Cavium, Inc. – San Jose, CA
    Est. Salary $94k-$130k
    24 days ago 24d
    memory coherency, memory ordering. Strong background in Soc verification methodology and test bench development using HVL such as… as Verilog, System Verilog, UVM and C/C++. Strong verification skills, understanding of methodology (object oriented programming…
  • 4.8
    OSI Engineering – Sunnyvale, CA
    12 days ago 12d
    JOB DESCRIPTION: Verification Engineer in Sunnyvale, CA Must Have 3+ years of hands on experience in the following: • PCIe… assertions, test benches and score boarding for ASIC based verification Location: Sunnyvale, CA Type: Contract (3+ months)…
  • 4.2
    Curtis Instruments, Inc. – Fremont, CA
    Est. Salary $70k-$97k
    3 days ago 3d
    As our Sr. Verification Engineer, you’ll be leading verification activities from formulating verification strategies to coordinating… life cycle. This NEW Sr. Verification Engineer position is a needed addition to our growing verification team. What you’ll do:…
  • 2.8
    SK Hynix – San Jose, CA
    Est. Salary $99k-$135k
    12 days ago 12d
    advanced verification techniques Write tools and scripts to enhance the verification process Developing the architecture and design… design of the verification environment Requirements MS degree in EE Minimum 5+ years of design verification in the field…
  • 3.3
    Alten Calsoft Labs – San Jose, CA
    Est. Salary $82k-$113k
    6 days ago 6d
    Makefiles, Perl scripting a must • Chip/full system level ASIC Verification skills, and debug skills a must o Debug using waveforms a… emulation test bench or a board o System level knowledge/verification does not mean signal integrity checking, electrical checks…
  • 3.3
    Mobiveil – Milpitas, CA
    EASY APPLY
    Est. Salary $69k-$96k
    3 days ago 3d
    of functional verification fundamentals encompassing state machine verification, complex protocol verification, functional test… strategies, directed and stress test generation, verification infrastructures and verification and/or debug flows In depth knowledge…
  • 3.5
    Synapse Design – San Jose, CA
    Est. Salary $84k-$116k
    23 days ago 23d
    Responsibilities: Work with RTL designer/system engineer define test plan according to system specification. Integrate RF behavior… or similar language; Experience with constrain random verification methodology, such as UVM/OVM. 6+ years industry experience…
  • 3.0
    Innovative Logic Inc. – Santa Clara, CA
    Est. Salary $75k-$104k
    24 days ago 24d
    Looking for Verification Engineer who has recent experience working on IP verification preferably with experience in DDR3, DDR4… DDR4 or RLDRAM · Experience working on IP verification preferably with experience in DDR3, DDR4 or RLDRAM.…
  • Barefoot Networks – Palo Alto, CA
    Est. Salary $76k-$97k
    5 days ago 5d
    Responsibilities: Senior DV engineer responsible for defining and implementing verification methodology and verifying in any… Units Execution Units Will be responsible for developing verification infrastructure from grounds up Work with Architecture and…
  • 3.8
    Pure Storage – Mountain View, CA
    Est. Salary $128k-$174k
    6 days ago 6d
    working on a small team of seasoned software and hardware engineers, like yourself, to define and build an innovative storage… developing an industry shaping product, FlashBlade. You are an engineer who loves to solve hard problems and build bulletproof systems…
  • 3.3
    Micron – Milpitas, CA
    Est. Salary $107k-$139k
    2 days ago 2d
      As a Design Verification Engineer at Micron Technology, Inc. , you will be responsible for design verification in NAND Solid… using design modeling and Verification IPs, Universal Verification Methodology (UVM), Open Verification Methodology (OVM), waveform…
  • 4.4
    Macropace Technologies – San Jose, CA
    EASY APPLY
    Est. Salary $77k-$108k
    5 days ago 5d
    ASIC Verification Engineer San Jose, CA Full Time Position Job Description: 5 to 10 years of directly related… experience in ASIC / SoC Verification Expert knowledge in UVM, which is an object-oriented Hardware verification language library based…
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