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Verification Engineer Jobs in Cupertino, CA

1,666Jobs

  • 3.9
    Cisco Systems – San Jose, CA
    $105k-$133k(Glassdoor est.)
    HOT
    Experience in high-performance ASIC verification. Good understanding of ASIC design and verification methodologies and flows. Hands-on… Participate in the architecture and verification of complex, high-performance, and highly integrated ASICs used in Cisco's networking…
  • 3.7
    Intel Corporation – Santa Clara, CA
    $98k-$133k(Glassdoor est.)
    NEW
    experienced VerificationEngineer. Your responsibilities will include but are not limited to: Pre-silicon verification activities… US, California, San Diego; Job Type: VerificationEngineer Job Description Join Intel as part of the BaseBand…
  • 4.7
    Macropace Technologies – San Jose, CA
    EASY APPLY
    $83k-$114k(Glassdoor est.)
    9 days ago 9d
    VerificationEngineer San Jose, CA Full Time Position Job Description: Pre-silicon system verification. This include… with complex ASIC designs and/or verification Experience in leading a small team of engineers Familiar with System Verilog language…
  • 3.3
    Rambus – Sunnyvale, CA
    $131k-$177k(Glassdoor est.)
    12 days ago 12d
    ASIC VerificationEngineer to join our world class technology team in our San Francisco or Sunnyvale office. This engineer will… and architects, other verificationengineers and system test engineers, security experts, and cryptographers. Cryptography and hardware…
  • 2.7
    L&T Technology Services – Santa Clara, CA
    $92k-$128k(Glassdoor est.)
    5 days ago 5d
    BSEE + 8 years or MSEE + 5 years , VerificationEngineer Job Locations US-CA-Santa Clara… on ASIC Verification including UVM/OVM methodology. The candidate should have worked on large ASIC design verification including…
  • 3.9
    Cisco Systems – San Jose, CA
    $105k-$133k(Glassdoor est.)
    HOT
    will join a team of extremely talented FPGA design and verificationengineers who develop world-class industrial switching and routing… involved in the definition, design, system integration, and verification of industrial protocols and features for ruggedized networking…
  • 3.9
    Cohere Technologies, Inc – Santa Clara, CA
    $73k-$103k(Glassdoor est.)
    HOT
    component, subsystem and device level Integrate 3rd party verification IP Using scripting tools (e.g. Perl) to set up automated… simulator Direct experience w/ PCIe based systems and verification Experience verifying digital signal processing logic by…
  • Fungible – Santa Clara, CA
    EASY APPLY
    $91k-$126k(Glassdoor est.)
    21 days ago 21d
    VerificationEngineer - Santa Clara, CA Central to our mission is a highly programmable chip. As part of the verification… of experience in ASIC/SoC verification with SV/UVM environments In-depth knowledge of verification flows Clear understanding…
  • 4.0
    Apple – Santa Clara, CA
    $122k-$154k(Glassdoor est.)
    28 days ago 28d
    Design VerificationEngineer Job Number: 112990178 Santa Clara Valley, California, United States Posted: Oct. 5, 2017… functional verification, debug failures, manage bug tracking, and analyze and close coverage. Work with other verification teams…
  • 3.0
    Inmata Solutions – Santa Clara, CA
    $81k-$114k(Glassdoor est.)
    NEW
    Role: Principal VerificationEngineer Responsibilities: Sr. Staff/Principal Verificationengineer 8+ year Working experience… / SoC verification using UVM, OVM or System Verilog. Expertise in developing block level / system level verification environments…
  • 3.8
    Xilinx – San Jose, CA
    $125k-$157k(Glassdoor est.)
    19 days ago 19d
    Wireless FDST Verification group is looking for a Staff Design VerificationEngineer to provide technical leadership… PCIe verification is a plus. Verification experience in full chip verification is a plus. Familiarity with verification management…
  • 3.8
    Xilinx – San Jose, CA
    $110k-$140k(Glassdoor est.)
    9 days ago 9d
    is looking for a motivated engineer to join the DC solutions and PCIe Connectivity IP engineering team. As part of this team,… AXI, ML is a plus. Expertise complex random-constraint verification methodology UVM experience is a plus. Verilog HDL is required…
  • 3.7
    Intel – Santa Clara, CA
    $104k-$131k(Glassdoor est.)
    10 days ago 10d
    Join the NGS group as a Verificationengineer, and be responsible for carrying out RTL verification for 5G modem design and architecture… Developing verification and validation tools and flows, as needed. Apply advanced techniques to achieve verification and validation…
  • 4.7
    Macropace Technologies – San Jose, CA
    EASY APPLY
    $83k-$114k(Glassdoor est.)
    6 days ago 6d
    VerificationEngineer San Jose, CA Full Time Position Job Description: 8+ years of experience with complex ASIC designs… coverage verification plan Experience on Emulation will be an add on. Experience in leading a small team of engineers Familiar…
  • 3.8
    Xilinx – San Jose, CA
    $85k-$117k(Glassdoor est.)
    11 days ago 11d
    Oversee verification and documentation for Xilinx ASIC/FPGA development. Define and implement verification infrastructure and… IO IP Verification. Will help to design, develop and use digital/mixed-signal simulation and/or formal based verification environments…
  • 3.7
    Lockheed Martin – Sunnyvale, CA
    $75k-$108k(Glassdoor est.)
    5 days ago 5d
    , California: Act as a VerificationEngineer under the Remote Sensing requirements and verification organization. Provide technical… level verification. Coordinate and facilitate meetings to resolve verification issues; may include senior engineering management…
  • 3.6
    Redolent, Inc – San Jose, CA
    $71k-$91k(Glassdoor est.)
    5 days ago 5d
    urgent requirement with our client: Title: Design VerificationEngineer Location: San Jose-CA Duration: 6 Months Compensation… GPU memory system verification team. Experience Requirements: Experienced Samsung with verification methodology such UVM…
  • 4.7
    Macropace Technologies – San Jose, CA
    EASY APPLY
    $82k-$106k(Glassdoor est.)
    4 days ago 4d
    Design VerificationEngineer San Jose, CA Fulltime Position Job Description: Responsibility Pre-silicon system… with complex ASIC designs and/or verification Experience in leading a small team of engineers Familiar with System Verilog language…
  • 5.0
    Tarana Wireless, Inc – Santa Clara, CA
    $85k-$117k(Glassdoor est.)
    5 days ago 5d
    Engineering: Asic VerificationEngineers master of science in electrical engineering or related & 2 plus years experience Asic… Asic or Vlsi. SoC/FPGA Engineer master of science in electrical engineering and 5 plus years experience. recblid cddj38wyjlgmry8vp8tvam4hcmsx0m…
  • 3.7
    Barefoot Networks, Inc. – Santa Clara, CA
    EASY APPLY
    $90k-$115k(Glassdoor est.)
    NEW
    Responsibilities: Senior DV engineer responsible for defining and implementing verification methodology and verifying in any… Execution Units Will be responsible for developing verification infrastructure from grounds up Work with Architecture and…
  • 3.5
    Synapse Design – San Jose, CA
    EASY APPLY
    $87k-$120k(Glassdoor est.)
    10 days ago 10d
    or similar language; Experience with constrain random verification methodology, such as UVM/OVM. 6+ years industry experience… Responsibilities: Work with RTL designer/system engineer define test plan according to system specification. Integrate RF…
  • Arteris – Campbell, CA
    $81k-$104k(Glassdoor est.)
    5 days ago 5d
    Design VerificationEngineer Campbell, CA, USA Do you want to contribute to the backbone of the some of the world's most… or in another engineering/technical discipline with equivalent experience Minimum 8 years of design verification experience verifying…
  • 5.0
    Tarana Wireless, Inc – Santa Clara, CA
    $85k-$117k(Glassdoor est.)
    6 days ago 6d
    ENGINEERING: ASIC Ver Engrs MSEE or rel & 2+ yrs exp ASIC or VLSI. SoC/FPGA Eng MSEE & 5+ yrs exp. Mail resume: HR, Tarana Wireless…
  • 4.3
    Zensa – Mountain View, CA
    $83k-$114k(Glassdoor est.)
    12 days ago 12d
    VerificationEngineer - System Level Location: Mountain View, CA Duration: 6-12 Months Skill set: Verilog and… Makefiles, Perl scripting a must Chip/full system level ASIC Verification skills, and debug skills a must Debug using waveforms…
  • 3.5
    Happiest Minds Technologies – San Jose, CA
    $94k-$130k(Glassdoor est.)
    4 days ago 4d
  • 4.4
    NVIDIA – Santa Clara, CA
    $146k-$195k(Glassdoor est.)
    13 days ago 13d
    We're now looking for a Senior VerificationEngineer: As a Senior CPU Verificationengineer at NVIDIA, you'll verify the design… advanced verification methodologies. You are expected to understand the design and implementation, define the verification scope,…
  • 3.6
    Broadcom Corporation – San Jose, CA
    $103k-$139k(Glassdoor est.)
    5 days ago 5d
    strong and expert level ASIC VerificationEngineer in the area of PCIe SSD Controller verification working with the latest, greatest… / SoC verification using UVM, OVM or System Verilog. Expertise in developing block level / system level verification environments…
  • 3.8
    Xilinx – San Jose, CA
    $108k-$158k(Glassdoor est.)
    13 days ago 13d
    Functional Verification Technical Lead Engineer Memory Controller IP Verification (DDR, LPDDR, RLDRAM, QDR, HBM)… Xilinx FDST Verification group is looking for a Staff Design VerificationEngineer to provide technical leadership and contribution…
  • 4.2
    Arista Networks – Santa Clara, CA
    EASY APPLY
    $54k-$70k(Glassdoor est.)
    14 days ago 14d
    by performing Electrical Design Verification Tests Participate on project teams of engineers involved in specification, design… or MS Electrical / Computer Engineering 0-5 years of experience in Electrical Design Verification Testing (EDVT) Hands on capability…
  • 3.8
    Xilinx – San Jose, CA
    $125k-$157k(Glassdoor est.)
    11 days ago 11d
    Wireless FDST Verification group is looking for a Staff Design VerificationEngineer to provide technical leadership… PCIe verification is a plus. Verification experience in full chip verification is a plus. Familiarity with verification management…
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