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ASIC Design Engineer Jobs in Fremont, CA

468Jobs

  • 3.6
    Redolent, Inc – San Jose, CA
    EASY APPLY
    $61k-$86k(Glassdoor est.)
    21 days ago 21d
    following urgent need with our client Title - RTL DesignEngineer (ASIC/FPGA any one) Duration - Full Time Location - San… San Jose-CA Rate : DOE Required Skills RTL DesignEngineer with WI-FI domain. Solid understanding of fundamentals…
  • 3.5
    Omnivision Technologies, Inc – Santa Clara, CA
    $109k-$144k(Glassdoor est.)
    NEW
    digital ASIC IP for image/video processing. Support FPGA validation. Perform chip bring-up, validation, debug and test generation… Responsibilities: Design and Support DDR/LPDDR Controller design and next generation proprietary dram design. Design and verify digital…
  • 3.1
    Hermes-Microvision – San Jose, CA
    EASY APPLY
    $63k-$79k(Glassdoor est.)
    5 days ago 5d
    Work with partners on the design process of the digital components. Together with the designengineering team from the partners,… hands-on experiences, in electrical engineering. Hands-on experiences of analog IC design, layout, verification, tape out, and…
  • 3.7
    Lockheed Martin – Sunnyvale, CA
    $88k-$117k(Glassdoor est.)
    7 days ago 7d
    Digital Processor ASIC/FPGA Designer: The Senior ASIC/FPGA DesignEngineer will be working in the RF Center of Excellence (… (RF CoE). The Senior FPGA/ASICdesigner will provide technical support to the RF COE ASIC/FPGA design Team. The individual…
  • 4.0
    Nokia – Sunnyvale, CA
    20 days ago 20d
    conventional design techniques. As a Senior Engineer, 5G ASICDesign, you will effectively communicate your design ideas to fellow… wireless communications! We are now looking for Senior Engineer, 5G ASICDesign to join our team. Key responsibilities In this…
  • 3.9
    Cisco Systems – San Jose, CA
    $116k-$157k(Glassdoor est.)
    HOT
    state-of-the-art design, verification and physical design methodologies created by one of the most advanced ASIC teams in the world… : Experience in high-performance ASIC verification. Good understanding of ASICdesign and verification methodologies and flows…
  • 3.3
    Enphase Energy – Santa Clara, CA
    $124k-$164k(Glassdoor est.)
    NEW
    8+ years ASICdesign experience with 2-3 years FPGA synthesis and design experience Solid experience with RTL design using Verilog… functional specifications and documentation Coding in Verilog RTL ASIC integration Performing functional and logical verification…
  • 3.1
    Toshiba America Electronic Components – San Jose, CA
    EASY APPLY
    $142k-$182k(Glassdoor est.)
    13 days ago 13d
    Enterprise SSD requirements Participate in the SSD Controller ASIC HW & FW specification development Implementation of Flash controller… experience in SSD controller H/W architecture & design Strong Experience in RTL design, design verification, synthesis & formality Solid…
  • 3.4
    SanDisk – Milpitas, CA
    $84k-$117k(Glassdoor est.)
    23 days ago 23d
    YOU define what's possible. We are seeking for an ASICDesignEngineer to work on our proprietary Flash Memory controller for… Electrical or Computer engineering Have 5-9 years of industry experience with successful ASIC/FPGA Design and Verification signoff…
  • 3.5
    AMD – Sunnyvale, CA
    $106k-$144k(Glassdoor est.)
    18 days ago 18d
    years or Bachelor with at least 8 years working experience in ASIC area #LI-PS1 Requisition Number: 45642 Country: United… Work with IP logic design, Physical design, and SOC teams for highfrequency interconnection design Work with macro team…
  • 3.7
    Lockheed Martin – Sunnyvale, CA
    $88k-$119k(Glassdoor est.)
    7 days ago 7d
    Digital Processor ASIC/FPGA Designer: The Staff ASIC/FPGA DesignEngineer will be working in the RF Center of Excellence (RF… effort to meet the customer requirements. The Staff FPGA/ASICdesigner will provide technical support across the enterprise as…
  • 3.2
    Aquantia – San Jose, CA
    EASY APPLY
    $82k-$104k(Glassdoor est.)
    5 days ago 5d
    and Experience: BS+8 or MS+6 (preferred) in Electrical Engineering, Computer Science or related Minimum 8-12 years of hands-on… _____ Qualifications: Full understanding of digital design verification methodologies and tools including: Expertise…
  • 4.0
    ASML – San Jose, CA
    $136k-$177k(Glassdoor est.)
    HOT
    applications? We are looking for an analog IC designengineer to be responsible for engineering of analog and digital components of the… with partners on the design process of the analog components. Together with the designengineering team from the partners…
  • 4.0
    Abjayon Inc – San Jose, CA
    4 days ago 4d
    Job Code: ABJ 1720 Sr. ASIC/SoC Verification Storage Protocol Engineer (Contract 7 Month), San Jose CA About Our Client:Our… Summary: Our Client is looking for a Senior ASIC/SoC Verification Engineer (Contract Position) to join their team in San Jose…
  • 3.7
    Lockheed Martin – Sunnyvale, CA
    $133k-$175k(Glassdoor est.)
    7 days ago 7d
    Digital Processor ASIC/FPGA Designer: The Senior Staff ASIC/FPGA DesignEngineer will be working in the RF Center of Excellence… to meet the customer requirements. The Senior Staff FPGA/ASICdesigner will provide technical support across the enterprise as…
  • 3.1
    Hermes-Microvision – San Jose, CA
    EASY APPLY
    $85k-$113k(Glassdoor est.)
    5 days ago 5d
    the design process of the analog components. Together with the designengineering team from the partners, identify design solutions… hands-on experiences, in electrical engineering. Hands-on experiences of analog IC design, layout, verification, tape out, and…
  • 3.5
    Micron – Milpitas, CA
    $106k-$135k(Glassdoor est.)
    5 days ago 5d
    including more senior engineers and management teams. Requirements: Experience working with CMOS ASICdesign & foundry teams.… aspects of ASIC product engineering, including correlation of production issues to process parameters, ability to work with ASIC validation…
  • 2.8
    SK Hynix Memory Solutions – San Jose, CA
    $87k-$120k(Glassdoor est.)
    4 days ago 4d
    of Hardware Design, Verification and Validation Principles Strong experience with Verilog and System Verilog design of complex… complex IP blocks working with high speed design. Understanding of PCIe, DDR or NAND protocol would be a big plus. 3-5 years of…
  • 3.1
    Toshiba America Electronic Components – San Jose, CA
    EASY APPLY
    $108k-$147k(Glassdoor est.)
    6 days ago 6d
    verification methodology Requirements: 12+ years of SoC/ASIC verification experience Hands on experience using UVM Good… development of a verification plan, in collaboration with the design and architecture teams, the definition and implementation of…
  • 3.5
    Collabera – San Jose, CA
    NEW
    California Skills : FPGA, Research, SAN, ASIC, Architecture, Embedded, Perl, Engineering, Windows 2003, Linux, Windows 2000, Networking… Cadence Description : Title/Job ID: Sr. ASIC/SoC Verification Storage Protocol Engineer (3946) Location: San Jose, CA 95134…
  • 3.1
    Western Digital – Milpitas, CA
    27 days ago 27d
    what’s possible. The ASICDesign Verification Manager will manage a team of engineers performing verification of RTL,… ASICDesign Verification Manager Location: Milpitas, CA, United States Req ID: JR-0000027569 Apply for this Job…
  • 3.3
    cPacket Networks – San Jose, CA
    $85k-$114k(Glassdoor est.)
    21 days ago 21d
    expected to be able to design, implement and test both unit level modules and higher level architecture designs. Candidates should… should be comfortable understanding tradeoffs in the design and be able to articulate them. This role requires being able to develop…
  • 3.9
    Cisco Systems – San Jose, CA
    $115k-$155k(Glassdoor est.)
    6 days ago 6d
    forwarding was performed in dedicated ASICdesigns. These days we are looking to make those ASICs more general and programmable. P4… traffic management features in ASICs, including queuing, shaping, policing, QOS Familiarity with ASIC abstraction layers Experience…
  • 3.3
    Enphase Energy – Santa Clara, CA
    $103k-$142k(Glassdoor est.)
    NEW
    Sr. ASIC Validation Engineer to work in our Santa Clara design center. Requirements: BS/MS Electrical Engineering 5… projects. Enphase Energy designs mixed-signal Application-Specific Integrated Circuits (ASIC) to control our industry-leading…
  • 4.0
    Apple – Santa Clara, CA
    $114k-$162k(Glassdoor est.)
    NEW
    that fosters engineering excellence, creativity, and innovation. We are looking for Sensor ASIC Hardware Engineers to help develop… verification plans, review ASICdesign and development process with IC vendors Schematic design, simulation, and prototyping…
  • Fujitsu Network Communications – Sunnyvale, CA
    28 days ago 28d
    www.socionext.com/en/ We are seeking a seasoned DesignEngineer for our ASIC business unit. The primary responsibilities… tradeoff, RTL design using Verilog/System Verilog, SoC Integration CDC, LINT Requires an excellent understanding of ASIC design…
  • 3.6
    MoTek Technologies – San Jose, CA
    19 days ago 19d
    the design process of the analog components. Together with the designengineering team from the partners, identify design solutions… hands-on experiences, in electrical engineering. Hands-on experiences of analog IC design, layout, verification, tape out, and…
  • 4.1
    TEEMA – Sunnyvale, CA
    22 days ago 22d
    ASIC Physical Design Place and Route Engineer KEY RESPONSIBILITIES: Block or Chip Level Floor planning, Bus / Pin Planning… solutions REQUIREMENTS: Over 6 years’ experience in ASIC Physical Design from RTL to GDSII Excellent analytical and problem…
  • 3.7
    Intel Corporation – San Jose, CA
    $95k-$130k(Glassdoor est.)
    20 days ago 20d
    implementing and verifying DFx features of our ASIC and FPGA products. The design styles span ASIC, Semi-Custom, and Custom.Responsibilities… Category: Engineering Primary Location: San Jose, CA US Other Locations: Job Type: Experienced Hire ASIC/SOC DFx…
  • 3.7
    Lockheed Martin – Sunnyvale, CA
    $88k-$119k(Glassdoor est.)
    5 days ago 5d
    Digital Processor ASIC/FPGA Designer: The ASIC/FPGA DesignEngineer will be working in the Optical Payloads Center of Excellence… Virtex, Microsemi antifuse, of full custom ASIC Experience leading a design element for ASIC/FPGA Active TS/SCI Clearance As…
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