Physical Design Engineer Jobs in Fremont, CA | Glassdoor

Physical Design Engineer Jobs in Fremont, CA

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  • 3.2
    Samsung Semiconductor, Inc. – San Jose, CA
    Est. Salary $110k-$150k
    6 days ago 6d
    JOB TITLE GPU Physical Design Engineer Requisition ID DSA31008 OVERVIEW Samsung Semiconductor, Inc. is… the physical design position for our GPU IP physical design prototyping team. The team will own prototyping for physical implementation…
  • 3.7
    Synapse Design – Santa Clara, CA
    Est. Salary $92k-$127k
    1 days ago 13hr
    Job Job Job Opening: Physical Design Engineer Job DuResponsibilities: - Participate in design, verification, and validation… experience in the job offered, IC Design Engineer, CAD Engineer, or Equivalent. To appApply please mention Job Code PDE01 and…
  • 2.7
    L&T Technology Services – Santa Clara, CA
    Est. Salary $89k-$121k
    7 days ago 7d
    of industry experience in the following technical areas: Physical design implementation (Placement, CTS, STA) in advanced technologies… Education: Required: Bachelor's, Electrical Engineering Preferred: Master's, Electrical Engineering
  • Technical-Link N. America – San Jose, CA
    Est. Salary $108k-$148k
    30+ days ago 30d+
    Minimum Qualifications: At least 5 years experince in Physical Design Able to deal with MSM Top level complexity from FP, Placement… through P&R from Netlist to GDS including timing closure and Physical verification.…
  • 3.7
    Tsmc North America – San Jose, CA
    Est. Salary $101k-$138k
    16 days ago 16d
    ENGINEERS, Physical Design from netlist to DGSII, APR, EDA & flow; Design Engineer for ASIC dsgn, RTL/Gate simulatn, synthesis…
  • 3.2
    LanceSoft Inc. – San Jose, CA
    30+ days ago 30d+
    exposure to all aspects of design flows like floorplanning, placement, CTS, routing, crosstalk avoidance, physical verification. Well… methodology with help of local and external CAD/EDA teams for faster design convergence…
  • 3.7
    Synapse Design – Santa Clara, CA
    Est. Salary $91k-$126k
    4 days ago 4d
    experience required Skill Set: BS, MS in electrical engineering or computer engineering Experience using Synopsys ICC or Cadence SOC… (10M+ gates) at 28 nm or below Expertise in floorplanning, Physical Synthesis, CTS, Routing Expertise in low power flow (power…
  • 4.0
    Apple – Santa Clara, CA
    Est. Salary $117k-$158k
    23 days ago 23d
    Design engineer you will be involved with all phases of physical design of high performance PHY design from RTL to delivery of our… Physical Design Engineer Job Number: 55165149 Santa Clara Valley, California, United States Posted: Mar. 11, 2017 Job Summary…
  • BRIDGENEX – Palo Alto, CA
    Est. Salary $77k-$105k
    1 days ago 1d
    floor-planning, routing, and physical sign off • Work closely with package engineering team to optimize the design for system level usage… responsible for the overall Physical Design and Integration of a mixed-signal chip Responsibilities • Physical integration of a Mixed-Signal…
  • 2.4
    PROMEDIA TELECOM – Santa Clara, CA
    Est. Salary $73k-$102k
    16 days ago 16d
    high Frequency design closure using 14nm/10nm Finfet technology Required Skills: ++Must have strong Physical design skills, block… Electrical Engineering or Computer Engineering ++Preferred: Masters in Electrical Engineering or Computer Engineering Duration:…
  • 3.4
    Altera – San Jose, CA
    Est. Salary $110k-$151k
    15 days ago 15d
    As a Physical Design Engineer, you will plan and execute complex place-and-route efforts using state-of-the-art FinFET process… of 12 years of place-and-route experience from synthesis to physical verification (DRC, LVS) Experience with Synopsys implementation…
  • Barefoot Networks, Inc. – Palo Alto, CA
    Est. Salary $74k-$100k
    19 days ago 19d
    visionaries, experienced technologists and engineers who have created a blueprint for designing and operating the worlds fastest and… equivalent is preferred 3+ years of work experience in physical design methodology/flow development and/or implementation work…
  • 4.4
    Google – Mountain View, CA
    Est. Salary $110k-$148k
    17 days ago 17d
    affecting millions of Google users. As a Physical Design Engineer, you will work on the physical implementation of ASICs using advanced… degree in Electrical Engineering or equivalent practical experience. 5 years of experience in ASIC physical design flows and methodologies…
  • Soal Technologies – Santa Clara, CA
    Est. Salary $94k-$127k
    7 days ago 7d
    Job Title Senior Physical Design Engineer Status Open Job ID 3707-AL Location City Santa… Implementation concerns a plus Experience and knowledge of tools for physical design implementation (Floor planning, CTS, P&R, STA) for CPUs…
  • 3.6
    Qualcomm – San Jose, CA
    Est. Salary $125k-$167k
    8 days ago 8d
    Job Id E1951504 Job Title Physical Design Engineer - Timing Closure Post Date 01/17/2017 Company -… Job Area Engineering - Hardware Location California - San Jose Job Overview Qualcomms Physical Design team implements…
  • 2.8
    Cyient – Milpitas, CA
    Est. Salary $77k-$107k
    9 days ago 9d
    industries. LOCATION Milpitas JOB DESCRIPTION ASIC Physical Design Engineers needed in Burlington VT, Austin TX, Raleigh/Durham… in 2016, Cyient is an acknowledged leader in engineering design services, design-led manufacturing, networks and operations, data…
  • 4.1
    Cadence Design Systems – San Jose, CA
    Est. Salary $78k-$109k
    2 days ago 2d
    Strong understanding of processor architechture, digital circuit design is required. Exposure to EDA implementation and simulation…
  • Novus Resources – Santa Clara, CA
    EASY APPLY
    Est. Salary $81k-$110k
    14 days ago 14d
    is looking for a qualified Sr. Physical Design Engineer to perform the following tasks: Physical Implementation of high frequency… Implementation Experience and knowledge of tools for physical design implementation (Floor planning, CTS, P&R, STA) for CPUs…
  • 3.4
    Cavium, Inc. – San Jose, CA
    Est. Salary $138k-$188k
    1 days ago 21hr
    sure all the blocks meet physical requirements. Implement/Support blocks with multi-voltage designs through all aspects of RTL… verification. Physical design knowledge, from netlist handoff to GDS tape out including floor planning, place and route, clock tree…
  • 2.6
    Knowles Intelligent Audio – Mountain View, CA
    Est. Salary $163k-$216k
    22 days ago 22d
    We invite you to join our creative and talented team as Physical Design lead in Mountain View, CA. As a member of this team you… (RTL to GDSII) At least 8+ years of experience with in physical design with Encounter/ICC, layout verification and static timing…
  • Soal Technologies – Santa Clara, CA
    Est. Salary $85k-$116k
    12 days ago 12d
    Job Title Physical Design Engineer/Engineering - Hardware Status Open Job ID 4023-DM Location… timing closure, formal and Physical verification. Education: Required: Bachelor's, Computer Engineering Preferred: Master's, Computer…
  • 3.4
    Cavium, Inc. – San Jose, CA
    Est. Salary $138k-$188k
    1 days ago 22hr
    Responsibilities: Implementation of physical design for large high speed chips in deep submicron process. Responsible to… to meet block goals for timing, area, and design rules, and will own multiple design blocks within a chip from initial RTL to tape…
  • 4.2
    Inphi Corporation – Santa Clara, CA
    Est. Salary $226k-$299k
    9 days ago 9d
    for execution of assigned physical design tasks independently and with focus on quality. The engineer will be managing related… responsibilities of this position include following specific physical design design tasks: Full chip level floorplanning/prototyping,…
  • Approgence – San Jose, CA
    Est. Salary $71k-$99k
    28 days ago 28d
    complete physical design. He will identify physical design issues in early stage, working with RTL engineer to fix. He will isolate… Job Title : ASIC Physical Design Engineer Job Location : San Diego & San Jose, CA Job Description : This person will…
  • 3.4
    Cavium, Inc. – San Jose, CA
    Est. Salary $77k-$107k
    1 days ago 1d
    analysis on complex logic blocks. Interface with the design team to drive design modifications to resolve congestion and timing issues… at least Junior year standing pursuing BS in Electrical Engineering Cavium, Inc. is an Equal Employment Opportunity Employer…
  • 4.0
    Cynet Systems – San Jose, CA
    Est. Salary $121k-$162k
    23 days ago 23d
    Job Title: Senior Physical Design Engineer - Direct Hire / Full Time / Perm Job Location: San Jose, CA Job Type: Full Time /… , PTSI and 14LPP. Physical Design Secondary Skills: Knowledge on the constraints, STA and Clock tree design. Samsung process…
  • 4.2
    Inphi Corporation – Santa Clara, CA
    Est. Salary $113k-$150k
    14 days ago 14d
    plus. In addition, the engineer will perform the following ASIC design tasks: Block level physical design and timing closure Static… for optimal execution of high performance and low power physical design. He/she will also have ownership of P&R/timing closure/…
  • 3.4
    Cavium, Inc. – San Jose, CA
    Est. Salary $138k-$188k
    18 days ago 18d
    Cavium, Inc. seeks Senior Lead Physical Design Engineers (multiple openings) to implement physical design (VLSI) for large high-speed… and Signal EM analysis signoff on subchips/blocks; Drive Physical verification (LVS/DRC/ANT) signoff of subchips/blocks; and,…
  • 3.0
    Innovative Logic Inc. – Santa Clara, CA
    Est. Salary $90k-$124k
    3 days ago 3d
    Looking for Senior Physical Design Engineer who has experience in 10nm. Candidate will be responsible to perform P&R, drc/lvs…
  • 3.0
    Avago Technologies – Santa Clara, CA
    Est. Salary $101k-$136k
    28 days ago 28d
    market. We are searching for engineers with an understanding of the fundamentals of physical design needed to create multi GHz processor… We are searching for physical design engineers to join us in Santa Clara California as we develop our next generation multi-core…
  • Yang Technical Solutions – San Jose, CA
    EASY APPLY
    13 days ago 13d
    Principal Physical Design/Timing Engineer Job Responsibilities Advanced process technology node engagement Design… EDI, StarRC-XT, Calibre, AOCV, timing closure Job Code: Physical Design Email: resumes@yangtechnical.catsone.com Phone: +1 919…
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