Principal ASIC Design Engineer Jobs in Fremont, CA | Glassdoor
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Principal ASIC Design Engineer Jobs in Fremont, CA

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  • 3.8
    Infinera – Sunnyvale, CA
    Est. Salary $156k-$199k
    11 days ago 11d
    impact on internal designs and architecture. Micro-architecture and design of ASIC/FPGA: Includes design documentation, review… 10+ years of experience in ASICDesign. Participation in at least 1 full ASIC cycle as a designer from Arch to Bringup Good…
  • 2.9
    Toshiba America Electronic Components – San Jose, CA
    EASY APPLY
    Est. Salary $128k-$164k
    18 days ago 18d
    supporting ASIC, FPGA and Palladium platforms SoC level DFT and test structures for ATE working closely with ASIC Vendor Work… Responsibilities: Participate in the SSD Controller ASIC HW & FW specification development SoC top level integration…
  • Career Brokers, Inc. – San Jose, CA
    Est. Salary $120k-$185k
    11 days ago 11d
    The group requires a ASIC verification engineer with extensive experience on networking ASIC verification, with in-depth knowledge… responsible of delivering ASICs for complex networking systems. You will collaborate with architects, design team, hardware and software…
  • 3.8
    Marvell Technology – Santa Clara, CA
    Est. Salary $86k-$109k
    12 days ago 12d
    control, supporting P&R, design rule checks RTL design and give design review. Work with testing engineer to evaluate, validate and… components. Principal job responsibilities include synthesis, timing optimization, static timing verification, power analysis, power domain…
  • Avalanche – Fremont, CA
    Est. Salary $105k-$163k
    7 days ago 7d
    Requirements 6+ years of experience in ASIC/Memory design, Analog or Digital Experience in memory design is a strong plus. Extensive… Job Description & Responsibilities As a principaldesignengineer at Avalanche Technology Inc., you will work closely with a…
  • 2.9
    Toshiba America Electronic Components – San Jose, CA
    EASY APPLY
    Est. Salary $93k-$127k
    25 days ago 25d
    , and building random/directed test benches. Working with design team and firmware team. Provides technical guidance to other…
  • 3.1
    Toshiba – San Jose, CA
    Est. Salary $69k-$95k
    30+ days ago 30d+
    , and building random/directed test benches. Working with design team and firmware team. Provides technical guidance to other…
  • 3.8
    Marvell Technology – Santa Clara, CA
    Est. Salary $101k-$127k
    12 days ago 12d
    simulation and verification, preparing design review. Work with testing engineer to evaluate, validate and debug silicon device. Work… components. Principal job responsibilities include the development of specifications, detailed RTLdesign, functional and timing simulation…
  • 2.4
    Aviat Networks – Milpitas, CA
    Est. Salary $125k-$166k
    13 days ago 13d
    an immediate need for a Principal Systems DesignEngineer. Duties 1. Contribute to the design, development and modification… their HW designs and layouts. More specifically with the interactions between the host processor and a switch or Modem ASIC. 9.…
  • 3.6
    Broadcom – San Jose, CA
    Est. Salary $125k-$169k
    5 days ago 5d
    Broadcom is the industry leading provider of networking switch ASIC's. CSG team focuses on developing network switch chips that power… following details tasks performed by a Hardware development engineer in various areas of the chip development: 1. Review and…
  • 3.5
    Dialog Semiconductor – Campbell, CA
    Est. Salary $122k-$164k
    5 days ago 5d
    digital design experience. Fluent in Verilog, System Verilog coding and ASICdesign methodology. Experience in SOC design with… continued growth, we seek a Principal Digital DesignEngineer. The role Working in the Digital Design team based in Campbell,…
  • 2.7
    Microsemi – Sunnyvale, CA
    Est. Salary $94k-$131k
    NEW
    to present the technical ideas to customers or team of principalengineers. Should be able to demonstrate the problem analytical… Staff Engineer, you will participate in every stage of the Linux, Vmware and Windows driver development starting with design, development…
  • 4.0
    Inphi Corporation – Santa Clara, CA
    7 days ago 7d
    Ability to work in an integrated team environment with ASIC and package designers. •Prior experience in setting up laser diode supply… •Experience in experimental designs to characterize device performance as a function of the design space. •Familiarity with optical…
  • 3.6
    Fortinet – Sunnyvale, CA
    Est. Salary $116k-$154k
    6 days ago 6d
    States [US] Principal Embedded Software Engineer, WiFi Fortinet is looking for a Principal Embedded Software Engineer with strong… alongside a close-knit team of experienced software, hardware and ASIC developers. Job Responsibilities: Develop Enterprise Wireless…
  • 3.4
    SanDisk – Milpitas, CA
    NEW
    Interface with internal engineers, corporate-IT and other relevant entities to support the ASIC team projects Requirements… Responsibilities: Evaluate, select, install and support ASIC EDA tools for our ASIC team across multiple sites Recommend and implement…
  • 3.8
    Infinera – Sunnyvale, CA
    Est. Salary $126k-$162k
    20 days ago 20d
    technology, sophisticated optics and world-class Coherent DSP ASICs. This position requires 6+ year’s FW development experience… Optical Engine used for Long Haul, Metro and Data Center Interconnects. Responsible for FW Requirement Documents, Design documents…
  • 2.7
    Microsemi – San Jose, CA
    Est. Salary $108k-$139k
    6 days ago 6d
    knowledge of FPGA design flows with a focus on timing and power analysis tools Working knowledge of ASIC and/or FPGA design flow, VHDL… signal circuit design. Working experience with analog and/or digital systems is an advantage Knowledge of FPGA design synthesis and…
  • 3.6
    Fortinet – Sunnyvale, CA
    Est. Salary $109k-$143k
    19 days ago 19d
    US] Principal Software Developer Engineer Overview Fortinet is looking for a Principal Software Developer Engineer with… alongside a close-knit team of experienced software, hardware and ASIC developers. Job Responsibilities Develop Secured Enterprise…
  • 4.0
    Cadence Design Systems – San Jose, CA
    Est. Salary $109k-$165k
    7 days ago 7d
    verification methodologies using UVM and SC/TLM. Should have Chip/ASICdesign or verification experience – knowledge of RTL & Behavioral… the world of technology. Job Description Sr. Principal Software R&D Engineer working in a team oriented environment to develop…
  • 3.8
    ANSYS – San Jose, CA
    Est. Salary $121k-$164k
    NEW
    power design methodologies -UNIX operating systems and proficiency in scripting using Perl and TCL -IC/ASICdesign flow experience… Principal Application Engineer HCR#17N32029448 JOB SUMMARY The Principal Application Engineer is responsible…
  • 3.8
    Marvell Technology – Santa Clara, CA
    21 days ago 21d
    prior experience in leading design team from definition to production. Good understanding switch ASIC architectures, network operating… with all the relevant engineering teams (i.e. includes package, signal integrity, digital and analogue design groups), product management…
  • Approgence – Santa Clara, CA
    19 days ago 19d
    Job Title : SoC Physical Design and RTL Delivery Lead / PrincipalEngineer Job Location : Santa Clara, CA Job Description… senior expert in SoC Physical Design and RTL Delivery Management for advanced modem Baseband ASIC. Provide technical support…
  • 3.6
    Xilinx – San Jose, CA
    Est. Salary $167k-$244k
    19 days ago 19d
    algorithms for ASICs and/or FPGAs. Expert with C , data structures, algorithms and its application to electronic design automation… software engineer to be part of the Xilinx Vivado Physical Implementation team. This team is responsible for design, implementation…
  • 2.7
    SK Hynix Memory Solutions – San Jose, CA
    Est. Salary $101k-$132k
    NEW
    modules and resolve issues. Debug and solve the bugs on FPGA/ASIC environment. Proactively contribute in teamwork. Proactively… Excellent code and design review skills. Ability to generate product level quality output. Experience in software design and programming…
  • 3.6
    Broadcom – Sunnyvale, CA
    Est. Salary $122k-$177k
    25 days ago 25d
    range of technology. Our team works closely with ASIC, DSP, and system engineers and we participate in the full product lifecycle… Software Engineer to contribute to the team responsible for wifi firmware development. Ideal candidates are seasoned engineers with…
  • 3.8
    Brocade – San Jose, CA
    Est. Salary $151k-$220k
    26 days ago 26d
    dynamic individual to lead a team of seasoned and senior engineers in the design and development of L2/L3 Control plane and Forwarding… Electrical Engineering or Computer Science. (MS/PHD is a big plus) - 10 years of experience in software architecture, design and development…
  • 2.7
    SK Hynix Memory Solutions – San Jose, CA
    Est. Salary $99k-$131k
    14 days ago 14d
    projects and resolve issues. Debug and solve the bugs on FPGA/ASIC environment. Proactively contribute in teamwork. Proactively… BS or higher in either Computer Science or Electrical Engineering
  • 2.7
    Microsemi – San Jose, CA
    Est. Salary $161k-$208k
    21 days ago 21d
    knowledge of FPGA design flows with a focus on timing and power analysis tools \u003cBR\u003e* Working knowledge of ASIC and/or FPGA… radiation-hardened analog mixed-signal integrated circuits, FPGAs, SoCs and ASICs; power management products; timing and synchronization devices…
  • 2.9
    Toshiba America Electronic Components – San Jose, CA
    EASY APPLY
    Est. Salary $111k-$145k
    25 days ago 25d
    as with cross functional teams including ASIC, hardware, test or application engineering. As a senior team member, you will participate… Jose, CA Job Overview: TAEC is looking for a Principal Firmware Engineer to join its SSD firmware team. In this role, you…
  • 4.0
    Cadence Design Systems – San Jose, CA
    Est. Salary $97k-$132k
    19 days ago 19d
    flow and design methodology. Candidates must have a strong background in hardware design and verification for ASIC and/or FPGA… electrical engineering or computer science 10+ years in hardware design or applications engineering for hardware design/verification…
  • 4.0
    Cadence Design Systems – San Jose, CA
    Est. Salary $109k-$166k
    26 days ago 26d
    RTL, such as Verilog, SystemVerilog, or VHDL. Knowledge of ASICdesign and methodology. Good communication skills. We’re doing…
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