Senior ASIC Engineer Jobs in Fremont, CA | Glassdoor

Senior ASIC Engineer Jobs in Fremont, CA

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  • 4.0
    VeriSilicon Holdings Co., Ltd. – San Jose, CA
    EASY APPLY
    Est. Salary $91k-$121k
    27 days ago 27d
    skills in Verilog Must be familiar with all stages of the ASIC design flow (including specification, architecture, and design…
  • 4.3
    NVIDIA – Santa Clara, CA
    Est. Salary $137k-$185k
    3 days ago 3d
    We're now looking for a Senior ASIC Verification Engineer:Nvidia’s invention of the GPU 1999 sparked the growth of the PC gaming… looking for you.What you'll be doing: As a key member of our ASIC Verification team, you will verify the design and implementation…
  • 3.9
    Apple – Santa Clara, CA
    Est. Salary $113k-$155k
    12 days ago 12d
    You will be responsible for the following: 1) Own all aspects of development design for large SOC blocks including: Internal…
  • 3.6
    Light – Palo Alto, CA
    Est. Salary $121k-$157k
    14 days ago 14d
    radically change photography. As our ASIC Design Engineer, you will be responsible for the full ASIC design cycle for our game-changing… accomplishwhat is needed to create an ASIC from conception to implementation Work with Light partners on ASIC design What you bring…
  • 4.9
    Light.co – Palo Alto, CA
    Est. Salary $100k-$130k
    25 days ago 25d
    radically change photography. As our ASIC Design Engineer, you will be responsible for the full ASIC design cycle for our game-changing… accomplishwhat is needed to create an ASIC from conception to implementation Work with Light partners on ASIC design What you bring to…
  • 3.9
    Apple – Santa Clara, CA
    Est. Salary $122k-$166k
    4 days ago 4d
    Senior ASIC Design Engineer - Cache Job Number: 52167565 Santa Clara Valley, California, United States Posted: Apr. 14,… Key Qualifications The ideal candidate will have 5+ years of ASIC design experience: 5+ years of development of memory system.…
  • 4.3
    NVIDIA – Santa Clara, CA
    17 days ago 17d
    We are now looking for a Senior ASIC Power Engineer: In this role you will be responsible for crafting and implementing the… Tesla products. As a senior team member, you will collaborate closely with Architecture, Software, ASIC, VLSI, DFT, Layout, and…
  • 3.5
    Broadcom – Santa Clara, CA
    Est. Salary $102k-$138k
    13 days ago 13d
    with design engineers to verify fixes. ○ Write diagnostics for validation of FPGA prototype (pre-tapeout) and ASIC. ○ Replicate… Charging Chips and other new initiatives. As a verification engineer, your responsibilities will include: ○ Architect block…
  • 3.0
    Innovative Logic Inc. – Palo Alto, CA
    Est. Salary $91k-$124k
    4 days ago 4d
    We are looking for a Senior Verification Engineer who has recent experience in NPU or Network switch · 5+ years of have… NPU · Recent experience in verifying TM, Classifier, Search Engine, Policer, or RED · This is a long term contracting position…
  • 3.9
    Apple – Santa Clara, CA
    Est. Salary $122k-$166k
    9 days ago 9d
    As a senior member of the SOC Design team you will be responsible for the following 1) Microarchitecture and design of RTL code…
  • 2.9
    Avago Technologies – Santa Clara, CA
    Est. Salary $103k-$134k
    13 days ago 13d
    with design engineers to verify fixes. ○ Write diagnostics for validation of FPGA prototype (pre-tapeout) and ASIC. ○ Replicate… Charging Chips and other new initiatives. As a verification engineer, your responsibilities will include: ○ Architect block…
  • 3.0
    Toshiba – San Jose, CA
    Est. Salary $66k-$92k
    29 days ago 29d
    This position will own the whole or parts of sub modules verification and/or full chip verification in SSD controllers. Such…
  • 3.0
    Innovative Logic Inc. – San Jose, CA
    Est. Salary $91k-$124k
    4 days ago 4d
    Looking for UVM verification engineer with experience in cache coherency · 2+ years of UVM verification with experience…
  • 3.8
    Cisco Systems – San Jose, CA
    Est. Salary $122k-$162k
    27 days ago 27d
    domain-specific languages. - Ability to communicate with ASIC engineers. Why Cisco We connect everything: people, processes, data… forwarding was performed in dedicated ASIC designs. These days we are looking to make those ASICs more general and programmable. P4…
  • Approgence – San Jose, CA
    Est. Salary $82k-$110k
    5 days ago 5d
    Job Title : Senior ASIC/ RTL Design Engineer with DSP Job Location : San Diego & San Jose, CA Job Description : This… silicon verification support. - Modem ASIC Design team is working with system engineer to understand wireless standards and define…
  • 3.9
    Apple – Santa Clara, CA
    Est. Salary $122k-$166k
    17 days ago 17d
    •Participate in Cache micro architecture development from specifications found from architecture guideline and model analysis…
  • 3.0
    Innovative Logic Inc. – San Jose, CA
    Est. Salary $91k-$124k
    9 days ago 9d
    Looking for UVM verification engineer with experience in cache coherency · 2+ years of UVM verification with experience…
  • 3.0
    Toshiba – San Jose, CA
    Est. Salary $104k-$134k
    29 days ago 29d
    technologies. Will drive the development of the SSD Controller ASIC design specification. Will Oversee & Mentor the Flash controller… memories & SSD eco-system. Education MSEE or PhD in Electrical Engineering or Computer Science…
  • 3.1
    Toshiba America Business Solutions – San Jose, CA
    Est. Salary $65k-$91k
    17 days ago 17d
    California City: San Jose Area of Interest: Engineering Equal Opportunity Employer Minorities/Women/Protected…
  • DWG (NY) – San Jose, CA
    Est. Salary $84k-$116k
    14 days ago 14d
    Roles & Responsibilities: Work on Processor level test bench environment to verify specific modules Develop coverage…
  • GigPeak – San Jose, CA
    EASY APPLY
    Est. Salary $106k-$155k
    28 days ago 28d
    Senior ASIC Design Engineer (Job Code WL) REPORTS TO: Director of ASIC Engineering LOCATION: San Jose, CA CLASSIFICATION:… currently seeking a Senior ASIC Design Engineer. Essential Duties and Responsibilities Management of ASIC design development…
  • 3.1
    Velodyne LiDAR – Alameda, CA
    Est. Salary $38k-$58k
    4 days ago 4d
    exciting time! Job Summary We are seeking a Bench Test engineer / Senior Lab Technician with experience in the assembly and test… organize lab equipment assist designers in the characterization of ASICs, electrical and opt-electric circuits Job Requirements Must…
  • 4.0
    Mentor Graphics – Fremont, CA
    Est. Salary $100k-$136k
    6 days ago 6d
    experience as an Applications Engineer in a relevant field. Networking experience is a plus. Chip/ASIC design or verification experience… Title: Senior Emulation Application Engineer - 5694 Job Location: US – CA – Fremont Job Category: Applications Engineering
  • 3.3
    Micron Technology, Inc. – Milpitas, CA
    Est. Salary $105k-$139k
    Today 6hr
    Req Id: 80441 As a Senior Design Engineer to work on the SSD controllers at Micron Technology, Inc., the individual will be… be involved in synthesis, timing closure, FPGA validation and ASIC bring-up. Qualifications: * MS Degree and 5-8+ years design…
  • 3.9
    Infinera – Sunnyvale, CA
    Est. Salary $144k-$184k
    4 days ago 4d
    the layout activities and give concise guidelines to layout engineers, need to be hands on in drawing layout if necessary; Be meticulous… tracking record of managing a team of 5 or more design and layout engineers at least two years; Collaborative with other local or remote…
  • 4.3
    NVIDIA – Santa Clara, CA
    Est. Salary $137k-$185k
    12 days ago 12d
    are now looking for a Sr ASIC Verification Engineer: NVIDIA is seeking elite ASIC Verification Engineers to verify the design and… for the future of computing. What you'll be doing: Verify the ASIC design, architecture, golden models and micro-architecture using…
  • 4.0
    Mentor Graphics – Fremont, CA
    Est. Salary $100k-$136k
    13 days ago 13d
    simulation, or recent experience as an Applications Engineer in a relevant field. Chip/ASIC design or verification experience - knowledge… Title: Senior Application Engineer – Emulation - 4761 Job Location: US – CA – Fremont Job Category: Applications Engineering
  • 3.2
    Finisar – Fremont, CA
    Est. Salary $108k-$141k
    13 days ago 13d
    KEY JOB DUTIES & RESPONSIBILITIES: • This is a senior engineer position responsible for designing and developing OSA (Optical… component suppliers to develop the necessary lasers, modulators, ASICs, silicon photonics, and passive optical components. Develop…
  • 2.9
    Fortive – Santa Clara, CA
    Est. Salary $97k-$127k
    Today 6hr
    Job Responsibilities The ASIC Mixed Signal engineer will be a member of the ASIC team that interacts with Analog/circuit designers… Requirements o Internship/industry experience in circuit and ASIC o Exposure to analog and mixed-signal IC design o Familiarity…
  • 4.3
    NVIDIA – Santa Clara, CA
    Est. Salary $113k-$155k
    3 days ago 3d
    We are now looking for a Senior Signal & Power Integrity Engineer What You'll Be Doing: Drive the next generation NVLink… requirements and product definition Work closely w/ Architecture, ASIC, Mixed Signal, Package, and PCB Design teams to design and ensure…
  • 3.9
    Infinera – Sunnyvale, CA
    Est. Salary $132k-$179k
    13 days ago 13d
    and traffic management using either NPU or Packet Processing ASIC (e.g., XGS Trident/Trident2, Dunes/Arad). Ability to come up… communicate effectively with customers, Marketing, senior management and engineers. Education Required: 12+ years of industry…
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