Senior ASIC Layout Design Engineer Jobs in Fremont, CA | Glassdoor

Senior ASIC Layout Design Engineer Jobs in Fremont, CA

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  • 3.1
    Inphi Corporation – Santa Clara, CA
    Est. Salary $109k-$145k
    17 days ago 17d
    plus. In addition, the engineer will perform the following ASIC design tasks: Block level physical design and timing closure Static… Minimum 7 years experience and MSEE Must understand chip layout/physical design concepts, methodologies and flows (i.e. floorplanning…
  • GigPeak – San Jose, CA
    Est. Salary $106k-$157k
    29 days ago 29d
    Job Description Senior ASIC Design Engineer (Job Code WL) REPORTS TO: Director of ASIC Engineering LOCATION: San Jose, CA… currently seeking a Senior ASIC Design Engineer. ESSENTIAL DUTIES AND RESPONSIBILITIES Management of ASIC design development. Meet…
  • 4.3
    NVIDIA – Santa Clara, CA
    15 days ago 15d
    are now looking for a Senior ASIC Power Engineer: In this role you will be responsible for designing and implementing the chip… products. As a senior team member, you will collaborate closely with Architecture, Software, ASIC, VLSI, DFT, Layout, and Product…
  • 3.8
    Infineon Technologies – Milpitas, CA
    Est. Salary $107k-$145k
    1 days ago 1d
    specifications Design and layout of evaluation boards Perform test characterization of RFIC Drive system engineering engagement… Senior RF Design Engineer At a glance Do you love to create with a passion for Engineering? If you love bringing brilliant…
  • 3.2
    International Rectifier – Milpitas, CA
    Est. Salary $117k-$161k
    2 days ago 2d
    specifications Design and layout of evaluation boards Perform test characterization of RFIC Drive system engineering engagement… Senior RF Design Engineer At a glance Do you love to create with a passion for Engineering? If you love bringing brilliant…
  • GigPeak – San Jose, CA
    Est. Salary $111k-$162k
    15 days ago 15d
    currently seeking a Senior ASIC Design Engineer. Essential Duties and Responsibilities * Management of ASIC design development… acquired ChipX, an ASIC company in 2009. These ASICs have been in production since 1989 and over 2000 ASIC designs have been completed…
  • 4.3
    NVIDIA – Santa Clara, CA
    Est. Salary $122k-$164k
    9 days ago 9d
    electrical design issues. What you'll be doing: Work on a design team to implement high speed / density ASIC packages Perform… for a Senior Package Engineer This position will collaborate with Technical Package Lead and design teams in the design and development…
  • 3.3
    Cavium, Inc. – San Jose, CA
    Est. Salary $129k-$179k
    22 days ago 22d
    Noise Analysis for ASICs on 28nm and below technology nodes; Work on Logical Equivalency between RTL and Layout at block and top… Cavium, Inc. seeks Senior Lead Physical Design Engineers (multiple openings) to implement physical design (VLSI) for large high-speed…
  • 3.8
    Cavium – San Jose, CA
    Est. Salary $127k-$173k
    15 days ago 15d
    Noise Analysis for ASICs on 28nm and below technology nodes; * Work on Logical Equivalency between RTL and Layout at block and top… Cavium, Inc. seeks Senior Lead Physical Design Engineers (multiple openings) to implement physical design (VLSI) for large high-speed…
  • 4.0
    Cadence Design Systems – San Jose, CA
    Est. Salary $85k-$118k
    2 days ago 2d
    processing ASICs and FPGAs, and is interested in establishing SI/PI system budgets and implementing the advanced design validation… coding, and FEC algorithms. Working knowledge of PCB design and layout, as it impacts signal and power integrity. Working knowledge…
  • 3.7
    Intel – San Jose, CA
    Est. Salary $90k-$141k
    18 days ago 18d
    organization works on all levels of ASIC development, spanning high-level architecture to RTL design and verification and volume manufacturing… multidimensional designs involving the layout of complex integrated circuits and performing all aspects of the SoC design flow from high-level…
  • 4.2
    ASIC North, Inc. – San Jose, CA
    30+ days ago 30d+
    complementing customers existing design teams, and providing engineering staff as needed. In addition, ASIC North develops and provides… Manager at ASIC NorthWilliston, Vermont Industry Semiconductors Employment type Full-time Experience Mid-Senior level…
Job Title Location Employer Salary
Senior Staff Engineer, Physical Design Santa Clara, CA Inphi Corporation $109k-$145k
Senior ASIC Design Engineer San Jose, CA GigPeak $106k-$157k
Senior ASIC Power Engineer Santa Clara, CA NVIDIA $137k-$177k
Senior RF Design Engineer Milpitas, CA Infineon Technologies $107k-$145k
Senior RF Design Engineer Milpitas, CA International Rectifier $117k-$161k
Senior ASIC Design Engineer (Job Code WL) San Jose, CA GigPeak $111k-$162k
Sr. Package Design Engineer Santa Clara, CA NVIDIA $122k-$164k
Senior Lead Physical Design Engineers - LEVP01 San Jose, CA Cavium, Inc. $129k-$179k
Senior Lead Physical Design Engineers - LEVP01 San Jose, CA Cavium $127k-$173k
SERDES System Architecture and Validation Engineer (Sr. Principal Engineer) San Jose, CA Cadence Design Systems $85k-$118k
Senior Design Lead San Jose, CA Intel $90k-$141k
Analog Circuit Design San Jose, CA ASIC North, Inc. $79k-$104k
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