Staff ASIC Design Engineer Jobs in Fremont, CA | Glassdoor
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Staff ASIC Design Engineer Jobs in Fremont, CA

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  • 3.8
    Infinera – Sunnyvale, CA
    Est. Salary $136k-$174k
    10 days ago 10d
    impact on internal designs and architecture. Micro-architecture and design of ASIC/FPGA: Includes design documentation, review… 6+ years of experience in ASICDesign. Participation in at least 1 full ASIC cycle as a designer from Arch to Bringup Good…
  • 3.2
    Seagate Technology – Fremont, CA
    Est. Salary $93k-$126k
    16 days ago 16d
    Experience with advance ASICdesign verification methodology such as UVM and VMM flow. Experience with all popular ASIC EDA tools like… for you. As a StaffDesignEngineer you will be working with system architects, digital and analog designers and testing team…
  • 3.1
    Huawei Technologies – Santa Clara, CA
    21 days ago 21d
    to deliver a better future...faster. Senior StaffEngineer - ASICDesign Location: Santa Clara, CA (R&D) Req #: 8342… electrical engineering or equivalent. At least 10 years of industrial experience in ASICdesign Solid ASICdesign experience…
  • 3.7
    Lockheed Martin – Sunnyvale, CA
    Est. Salary $127k-$167k
    NEW
    Digital Processor ASIC/FPGA Designer: The Senior StaffASIC/FPGA DesignEngineer will be working in the RF Center of Excellence… effort to meet the customer requirements. The Senior Staff FPGA/ASICdesigner will provide technical support across the enterprise…
  • 3.2
    Omnivision Technologies, Inc – Santa Clara, CA
    Est. Salary $102k-$135k
    22 days ago 22d
    digital ASIC IP for image/video processing. Support FPGA validation. Perform chip bring-up, validation, debug and test generation… Responsibilities: Design and Support DDR/LPDDR Controller design and next generation proprietary dram design. Design and verify digital…
  • 3.2
    Seagate Technology – Fremont, CA
    Est. Salary $107k-$145k
    16 days ago 16d
    innovation, seeks an ASICDesignEngineer for an exciting role at our new Freemont Design Center. The Senior StaffEngineer position is… understanding of ASICdesign methodology, high speed CMOS circuit and logic design knowledge including arithmetic unit designs such as…
  • Cohere Technologies, Inc – Santa Clara, CA
    Est. Salary $92k-$119k
    5 days ago 5d
    position for a Senior FPGA/ASICDesignEngineer in our Santa Clara office. In this position, you will design, implement and test digital… perform the detailed design and verification. This position reports directly to the Director of FPGA/ASICEngineering Required Qualifications…
  • 3.7
    Lockheed Martin – Sunnyvale, CA
    Est. Salary $84k-$113k
    NEW
    Digital Processor ASIC/FPGA Designer: The StaffASIC/FPGA DesignEngineer will be working in the RF Center of Excellence (RF… the effort to meet the customer requirements. The Staff FPGA/ASICdesigner will provide technical support across the enterprise…
  • 3.3
    Sony Electronics – San Jose, CA
    Est. Salary $90k-$122k
    24 days ago 24d
    and design. Sony Electronics, a global leader in image sensors, is seeking a staff VLSI/ASIC logic DesignEngineer to work… then develop and implement solutions Familiarity with ASIC/SoC design/verification methodologies Ability to write detailed…
  • 3.5
    Panasonic North America – Cupertino, CA
    14 days ago 14d
    Laboratory is seeking a Staff Analog/Mixed-Signal IC designengineer for an exciting opportunity to develop an ASIC within state-of-the-art… routinely interface with PDSLM’s MEMS designers to contribute at the system level (MEMS + ASIC). The candidate should be a self-motivated…
  • 2.7
    SK Hynix Memory Solutions – San Jose, CA
    Est. Salary $92k-$118k
    24 days ago 24d
    Descriptions: The ASICDesignEngineer will be working on the leading edge SSD controller IP design from architecture to production… support physical design and system level analysis. Qualifications: BS, MS, or PhD in Electrical Engineering with 5-10 years…
  • Fujitsu Network Communications – Sunnyvale, CA
    24 days ago 24d
    Physical Design for ASIC using Socionext Advanced Standard Cell technology. The Staff Physical DesignEngineer will have opportunities… are seeking a Staff Physical DesignEngineer for our Sunnyvale, CA location. The Staff Physical DesignEngineer will provide Physical…
  • 2.9
    Toshiba America Electronic Components – San Jose, CA
    EASY APPLY
    Est. Salary $127k-$171k
    28 days ago 28d
    Windows and Linux environments Other: 7+ years of SoC/ASIC verification experience Hands on experience using UVM SSD… development of a verification plan, in collaboration with the design and architecture teams, the definition and implementation of…
  • 3.9
    Synaptics – San Jose, CA
    15 days ago 15d
    position involves the bring-up of new ASIC features and incorporating those features into new design platforms. Significant experience… define architectures for the next-generation of touch-sensing ASIC’s. A solid understanding of analog and digital circuitry is required…
  • 3.9
    Synaptics – San Jose, CA
    25 days ago 25d
    applicants to apply for a career opportunity as a Senior StaffASIC Architect in our Platform Architecture department. This is… architectures for the next-generation of touch-sensing and fingerprint ASIC’s. A solid understanding of analog and digital circuitry is required…
  • 3.5
    QuickLogic – Sunnyvale, CA
    Est. Salary $110k-$144k
    6 days ago 6d
    digital simulator such as VERILOG Highly Desirable: ASICdesign experience Product development experience CAD experience… Posted On06/22/2017 Senior Staff, DesignEngineer Sunnyvale Salary Range : Worker Category…
  • 3.2
    Omnivision Technologies, Inc – Santa Clara, CA
    16 days ago 16d
    low power circuit architecture design Collaborates and leads other ASIC architecture engineers for proof of concept and performance… Description Primary person responsible for defining and developing ASIC chip architecture for video and vision processing Integrates…
  • 3.8
    Infinera – Sunnyvale, CA
    Est. Salary $125k-$161k
    NEW
    technology, sophisticated optics and world-class Coherent DSP ASICs. This position requires 6+ year’s FW development experience… Optical Engine used for Long Haul, Metro and Data Center Interconnects. Responsible for FW Requirement Documents, Design documents…
  • 2.7
    Microsemi – Sunnyvale, CA
    Est. Salary $94k-$131k
    NEW
    such as Operating System Drivers, Management Applications and ASIC teams in coming up with firmware interfaces optimized for the… As a Member Staff SW engineer, you will join the Storage Driver Development team involved in building world-class, high performance…
  • 3.6
    Xilinx – San Jose, CA
    Est. Salary $121k-$177k
    NEW
    the design/architecture uses the IPs effectively. Understand High Level Synthesis (HLS) in the context of FPGAs or ASICs; good… the design/architecture uses the IPs effectively. Understand High Level Synthesis (HLS) in the context of FPGAs or ASICs; good…
  • Fujitsu Network Communications – Sunnyvale, CA
    Est. Salary $77k-$106k
    NEW
    Physical Design for ASIC using Socionext Advanced Standard Cell technology. The Staff Physical DesignEngineer will have opportunities… are seeking a Staff Physical DesignEngineer for our Sunnyvale, CA location. The Staff Physical DesignEngineer will provide Physical…
  • Fujitsu Network Communications – Sunnyvale, CA
    NEW
    Physical Design for ASIC using Socionext Advanced Standard Cell technology. The Staff Physical DesignEngineer will have opportunities… are seeking a Staff Physical DesignEngineer for our Sunnyvale, CA location. The Staff Physical DesignEngineer will provide Physical…
  • 3.1
    Fujitsu – Sunnyvale, CA
    Est. Salary $81k-$111k
    NEW
    Physical Design for ASIC using Socionext Advanced Standard Cell technology. The Staff Physical DesignEngineer will have opportunities… are seeking a Staff Physical DesignEngineer for our Sunnyvale, CA location. The Staff Physical DesignEngineer will provide Physical…
  • 3.8
    Infinera – Sunnyvale, CA
    Est. Salary $120k-$181k
    10 days ago 10d
    levels of quality and performance. Experience with complex ASIC and board bring-up, boot code, RTOS BSP, device driver and embedded… best practices for the software engineering process, including documentation, modeling, design, development and QA. A track-record…
  • 3.9
    Synaptics – San Jose, CA
    Est. Salary $88k-$121k
    9 days ago 9d
    Responsibilities The IC Design team is searching for a hands-on, team oriented, ASICdesignengineer with strong digital design expertise.… . In this role, the engineer will be responsible for the design of digital blocks and sub-systems that implement innovative touch…
  • 3.9
    OSRAM – Sunnyvale, CA
    Est. Salary $77k-$94k
    13 days ago 13d
    seeking a Digital DesignEngineer to join our ASICS development team in Sunnyvale, CA. As a key member of Opto’s ASICS team, the successful… Position Title: Staff Digital IC DesignEngineer Location: Sunnyvale, CA Position Type: Exempt,…
  • 3.6
    Broadcom – San Jose, CA
    Est. Salary $91k-$125k
    8 days ago 8d
    Broadcom is the industry leading provider of networking switch ASIC's. CSG team focuses on developing network switch chips that power… following details tasks performed by a Hardware development engineer in various areas of the chip development: 1. Review and…
  • 3.4
    Renesas Electronics America – Santa Clara, CA
    Est. Salary $127k-$167k
    16 days ago 16d
    Number 17-0029 Post Date 3/21/2017 Title Sr. Staff Systems DesignEngineer City Santa Clara State CA Description Renesas… Implement engineering processes to ensure high quality designs • Create and present training material for MCUs, designs, and firmware…
  • 2.7
    Microsemi – Sunnyvale, CA
    Est. Salary $119k-$166k
    23 days ago 23d
    and other similar tools. Working knowledge of ASICdesign processes (design, verification, implementation, layout) and flows… and Static Timing Analysis Support FPGA emulation, ASIC lab validation including debugging in the lab, identifying the issues and…
  • 3.4
    SanDisk – Milpitas, CA
    Est. Salary $112k-$130k
    NEW
    BS in Electrical Engineering with a minimum of 5 years ATE testing program development experience on ASIC, flash memory, semiconductor… the incredible possible. Staff Test Engineering in R&D Engineering Be part of Test Engineering in a world class company R&…
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