Hardware ASIC Design Engineer Jobs | Glassdoor
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Hardware ASIC Design Engineer Jobs

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  • 4.6
    Facebook – Redmond, WA
    Est. Salary $108k-$159k
    21 days ago 21d
    candidate will be required to design custom ICs/ASICs to enable some of the functionalities in this hardware platform. This is a full-time… Redmond, WA office.Responsibilities: Designing, simulating, and testing of an IC display ASIC or SoC for use in a simulated reality…
  • 3.6
    Qualcomm – Santa Clara, CA
    Est. Salary $93k-$123k
    6 days ago 6d
    position, the designer will be responsible for architecture and micro-architecture design of the ASIC, RTL design and synthesis… audio/video, display, and architecture. These Multimedia ASICS are co-designed with our Modems, Applications Processors, Analog Codecs…
  • 3.7
    Lockheed Martin – Boulder, CO
    Est. Salary $68k-$92k
    NEW
    FPGA Engineer position provides the opportunity to get involved on the ground-floor of an exciting new program designing and developing… developing new software and hardware components to be integrated into the future F-35. The ideal candidate for this position would…
  • 2.6
    SEDAA – San Jose, CA
    Est. Salary $94k-$127k
    NEW
    prototype boards · Complete all Hardware qualification testing Desired Background: · ASIC, FPGA, System Verilog, PCB debug… is looking for a HardwareEngineer Consultant with 10+ years of experience in high speed board level design. Job Description…
  • 3.3
    NeuroLogica – Danvers, MA
    Est. Salary $60k-$74k
    21 days ago 21d
    Conducts research and testing of digital processing hardware such as computer chips (ASIC, CPLD, FPGA), circuit boards, computer systems… chipsets, RFICs and power management ASICs · Drive planning and execution of design verification test, factory test planning…
  • 3.9
    Cisco Systems – San Jose, CA
    Est. Salary $112k-$152k
    4 days ago 4d
    Experience in high-performance ASIC verification. Good understanding of ASICdesign and verification methodologies and flows… collaboration with design, software and hardware teams to ensure a successful product delivery. Mentor and enable other engineers.…
  • 2.9
    Toshiba America Electronic Components – San Jose, CA
    EASY APPLY
    Est. Salary $132k-$169k
    10 days ago 10d
    leader of the Storage Research and Design Center SoC development team, the Director, ASICdesign is responsible for creating innovative… architecture(s) and new ASICdesign(s) with RTL design & implementation as part of the primary task. The candidate will work closely…
  • 3.3
    Samsung Semiconductor, Inc. – San Jose, CA
    NEW
    JOB TITLE Logic Design and Hardware Architecture Lead Engineer Requisition ID DSA31141 OVERVIEW Samsung… and initiatives through feasibility, FPGA prototyping and ASICdesign Supervise verification contractors and oversee the verification…
  • 3.6
    NantWorks – San Diego, CA
    Est. Salary $102k-$134k
    16 days ago 16d
    Job Title: Sr. Modem ASICDesignEngineer Job Type: Full-time Job Area: EngineeringHardware Location: California… Speed Digital Design, Low Power ASICDesign Education Requirements: Masters, Electrical Engineering with 2+ years of…
  • 2.9
    Toshiba America Electronic Components – San Jose, CA
    EASY APPLY
    Est. Salary $128k-$165k
    16 days ago 16d
    supporting ASIC, FPGA and Palladium platforms SoC level DFT and test structures for ATE working closely with ASIC Vendor Work… prototyping and emulation platforms Work closely with FW engineers to resolve hardware issues Participate in continuous improvement of…
  • 5.0
    Light – Palo Alto, CA
    Est. Salary $97k-$132k
    8 days ago 8d
    Responsibilities: Design complex ASICs and FPGAs boards. Develop high-speed PCB design. Perform signal and power integrity… capture for flat and hierarchical designs with constraint driven layout. Perform PCB stack up designing, defining and verifying. Responsible…
  • 3.7
    Intel – San Diego, CA
    16 days ago 16d
    years' experience designing multi-million gate ASICs in advance process nodes 5+ years' experience designing cellular modem ICs… and Devices Group. We are looking for experienced Modem HardwareDesigners. In this position you will contribute to the development…
  • 3.6
    Xilinx – San Jose, CA
    Est. Salary $93k-$126k
    12 days ago 12d
    definition, design, verification, and documentation for Xilinx ASIC development. Determine architecture design, logic design, and system… Electrical Engineering, Computer Engineering or related field plus 5 years of progressive experience as DesignEngineer, System Design…
  • 3.9
    Adaptrum – San Jose, CA
    Est. Salary $92k-$119k
    5 days ago 5d
    definition, design, implementation and validation of the FPGA. Required Qualifications 5+ years of experience in ASIC/FPGA design… with software engineer to validate software and hardware integration. Education BS/MS in Electrical Engineering, Computer Science…
  • 4.4
    Google – Mountain View, CA
    Est. Salary $98k-$122k
    26 days ago 26d
    technologies that power all of Google's services. As a HardwareEngineer, you design and build the systems that are the heart of the… purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking…
  • 4.4
    SpaceX – Irvine, CA
    Est. Salary $149k-$194k
    16 days ago 16d
    Mars. PRINCIPAL DIGITAL ASICDESIGNENGINEER OVERVIEW: This is a principal digital ASICdesign role in the development of… principal digital ASICdesigner, you will be responsible for all aspects of digital ASICdesign focusing on RTL design, verification…
  • 3.7
    Intel – San Jose, CA
    Est. Salary $90k-$116k
    18 days ago 18d
    cross-functioning with IP teamsStrong understanding of hardwaredesign, design verification, timing analysis, clock domain crossing… Job Description Component DesignEngineers are responsible for the design and development of electronic components. Responsibilities…
  • Career Brokers, Inc. – San Jose, CA
    Est. Salary $120k-$185k
    9 days ago 9d
    of delivering ASICs for complex networking systems. You will collaborate with architects, design team, hardware and software teams… The group requires a ASIC verification engineer with extensive experience on networking ASIC verification, with in-depth knowledge…
  • 4.4
    Google – Madison, WI
    Est. Salary $77k-$111k
    NEW
    experience in FPGA/ASICdesign and experience with ASIC development. Experience with highly pipelined designs, and with multiple-clock-domain… developing improvements in overall design. Design and document one or more blocks of an ASIC, including functionality and timing…
  • 3.9
    Cisco Systems – San Jose, CA
    Est. Salary $93k-$138k
    4 days ago 4d
    Participate in a project team of engineers across geographies involved in the Design & Verification of ASICS for Company’s next generation… New HardwareEngineer What You'll Do Responsible for the specification, design, development, test, enhancement…
  • 3.7
    BTI Systems – United States
    NEW
    of delivering ASICs for complex networking systems. You will collaborate with architects, design team, hardware and software teams… : We are looking to hire an ASIC verification engineer with extensive experience on networking ASIC verification, with in-depth…
  • 5.0
    info-ways – Milwaukee, WI
    Est. Salary $68k-$97k
    4 days ago 4d
    in ASIC and FPGA implementation and verification for the Design Services organization JOB SUMMARY: The Engineer will… Electrical Engineering discipline. o Minimum of 5 years experience with standard cell ASIC and / FPGA design. o Candidate…
  • 3.4
    AMD – Sunnyvale, CA
    Est. Salary $100k-$136k
    13 days ago 13d
    JOB PURPOSE: Developing and maintaining world-class hardwaredesign flow in fast-paced production environment on the very edge… Bachelors degree in Electrical or Computer Engineering and 8 years Physical Design/CAD experience or Masters degree and 6 years…
  • 4.4
    Google – Mountain View, CA
    Est. Salary $101k-$132k
    9 days ago 9d
    in Electrical Engineering or equivalent practical experience. * Experience in software design and ASICdesign methodology development… installation/troubleshooting/debugging with vendors. As an ASICDesignEngineer on the chip implementation team, you will be responsible…
  • 3.9
    Juniper Networks – United States
    NEW
    of delivering ASICs for complex networking systems. You will collaborate with architects, design team, hardware and software teams… : We are looking to hire an ASIC verification engineer with extensive experience on networking ASIC verification, with in-depth…
  • 3.2
    Rambus – Sunnyvale, CA
    Est. Salary $102k-$139k
    NEW
    teams including ASICdesignengineers and architects, other verification engineers and system test engineers, security experts… Design and implement verification test plans, testbenches, infrastructure and platforms Work with ASICdesigners and architects…
  • 3.9
    Cisco Systems – San Jose, CA
    4 days ago 4d
    New Title: Technical Lead, ASIC Physical Design Location: San Jose, CA WHO YOU'LL WORK WITH:… creative and talented team as Physical Design Lead in San Jose, CA. You will work with ASIC Front-end teams to understand chip architecture…
  • 3.7
    Lockheed Martin – Grand Prairie, TX
    Est. Salary $116k-$153k
    11 days ago 11d
    Programmable Gate Array (FPGA) DesignEngineer for a position in Grand Prairie, TX. Digital Design encompasses the full life cycle… of electronic subsystems development. As such, the FPGA DesignEngineer will be responsible for: Development, integration…
  • 3.6
    Broadcom – San Jose, CA
    Est. Salary $125k-$169k
    NEW
    interfaces. The following details tasks performed by a Hardware development engineer in various areas of the chip development: 1.… specifications and how they map to networking hardware 4. Develop micro architecture and design specifications to support network switch…
  • 3.6
    Broadcom – San Jose, CA
    Est. Salary $91k-$125k
    NEW
    interfaces. The following details tasks performed by a Hardware development engineer in various areas of the chip development: 1.… specifications and how they map to networking hardware 4. Develop micro architecture and design specifications to support network switch…
  • 3.4
    Apex Systems – Washington, DC
    NEW
    Associated topics: asic, catia, chip, digital, engg, engineer, engineer iv, rf, schema, systems engineerHardwareEngineer Secret Clearance Required Work Location: Pentagon Requires a US citizenship with a DoD security clearance…
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