Staff ASIC Design Engineer Jobs in Milpitas, CA | Glassdoor
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Staff ASIC Design Engineer Jobs in Milpitas, CA

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  • 3.1
    Omnivision Technologies, Inc – Santa Clara, CA
    Est. Salary $100k-$138k
    13 days ago 13d
    production, to customer support. In-depth hands-on experience in ASIC design flow: RTL coding, simulation, synthesis, static timing analysis… timing control design and verification. Chip bring-up, validation, and debugging. Customer and application engineer (AE) support…
  • 3.4
    SanDisk – Milpitas, CA
    Est. Salary $112k-$153k
    3 days ago 3d
    Staff Engineer, ASIC Development Engineering Job Date: Jun 24, 2017 Location: Tefen, Israel Company… talented, energetic engineer with high intercommunication skills and motivation to become a great Chip Designer. Requirements…
  • Cohere Technologies, Inc – Santa Clara, CA
    Est. Salary $92k-$119k
    3 days ago 3d
    perform the detailed design and verification. This position reports directly to the Director of FPGA/ASIC Engineering Required Qualifications… implementations. 5 years of experience in ASIC/FPGA design. Strong VHDL/Verilog design experience. Preferred Qualifications…
  • 3.2
    Seagate Technology – Fremont, CA
    Est. Salary $89k-$124k
    14 days ago 14d
    Experience with advance ASIC design verification methodology such as UVM and VMM flow. Experience with all popular ASIC EDA tools like… for you. As a Staff Design Engineer you will be working with system architects, digital and analog designers and testing team…
  • 3.2
    Sony Electronics – San Jose, CA
    Est. Salary $90k-$121k
    21 days ago 21d
    and design. Sony Electronics, a global leader in image sensors, is seeking a staff VLSI/ASIC logic Design Engineer to work… then develop and implement solutions Familiarity with ASIC/SoC design/verification methodologies Ability to write detailed…
  • 2.7
    Microsemi – Sunnyvale, CA
    Est. Salary $94k-$131k
    1 days ago 16hr
    As a Member Staff SW engineer, you will join the Storage Driver Development team involved in building world-class, high performance… products for the Server OEMs and Data Centers As a Member Staff Engineer, you will participate in every stage of the Linux, Vmware…
  • 3.1
    Omnivision Technologies, Inc – Santa Clara, CA
    Est. Salary $100k-$138k
    19 days ago 19d
    production, to customer support. In-depth hands-on experience in ASIC design flow: RTL coding, simulation, synthesis, static timing analysis… timing control design and verification. Chip bring-up, validation, and debugging. Customer and application engineer (AE) support…
  • 3.2
    Magma Design – Mountain View, CA
    4 days ago 4d
    Business Title ASIC Digital Design Engr, Staff Requisition Number 13908BR Hiring Location(s) USA - California - Mountain… functional and timing closure of the design. Job Requirements: BS or MS in electrical engineering or computer science is required…
  • 3.7
    Synopsys – Mountain View, CA
    4 days ago 4d
    Business Title ASIC Digital Design Engr, Staff Requisition Number 13908BR Hiring Location(s) USA - California - Mountain… functional and timing closure of the design. Job Requirements: BS or MS in electrical engineering or computer science is required…
  • 3.8
    Synaptics – San Jose, CA
    12 days ago 12d
    position involves the bring-up of new ASIC features and incorporating those features into new design platforms. Significant experience… define architectures for the next-generation of touch-sensing ASIC’s. A solid understanding of analog and digital circuitry is required…
  • 3.1
    Omnivision Technologies, Inc – Santa Clara, CA
    Est. Salary $100k-$138k
    14 days ago 14d
    production, to customer support. In-depth hands-on experience in ASIC design flow: RTL coding, simulation, synthesis, static timing analysis… timing control design and verification. Chip bring-up, validation, and debugging. Customer and application engineer (AE) support…
  • 3.6
    Xilinx – San Jose, CA
    Est. Salary $121k-$177k
    Today 9hr
    optimizations, logic optimization and technology mapping algorithms for ASIC or FPGA synthesis tools is desirable. Hands on experience… solvers and timing analysis engines is desirable. Strong background in basic digital design principles, graph theory and…
  • 3.5
    Broadcom Corporation – San Jose, CA
    Est. Salary $90k-$124k
    4 days ago 4d
    Broadcom is the industry leading provider of networking switch ASIC's. CSG team focuses on developing network switch chips that power… following details tasks performed by a Hardware development engineer in various areas of the chip development: 1. Review and…
  • 3.2
    Seagate Technology – Fremont, CA
    Est. Salary $109k-$146k
    14 days ago 14d
    innovation, seeks an ASIC Design Engineer for an exciting role at our new Freemont Design Center. The Senior Staff Engineer position is… understanding of ASIC design methodology, high speed CMOS circuit and logic design knowledge including arithmetic unit designs such as…
  • 3.1
    OmniVision Technologies – Santa Clara, CA
    Est. Salary $100k-$138k
    18 days ago 18d
    production, to customer support. In-depth hands-on experience in ASIC design flow: RTL coding, simulation, synthesis, static timing analysis… timing control design and verification. Chip bring-up, validation, and debugging. Customer and application engineer (AE) support…
  • 3.8
    Synaptics – San Jose, CA
    Est. Salary $88k-$121k
    7 days ago 7d
    Responsibilities The IC Design team is searching for a hands-on, team oriented, ASIC design engineer with strong digital design expertise.… . In this role, the engineer will be responsible for the design of digital blocks and sub-systems that implement innovative touch…
  • 3.4
    Micron Technology, Inc. – Milpitas, CA
    Est. Salary $122k-$170k
    4 days ago 4d
    and NOR Flash memory, and extending to SSDs, modules, MCPs, ASICs, and other memory and storage systems solutions. We're 37 years… Perform Emulation for specified design scope. Skills/Education: * Bachelors/Masters in Engineering. * At least 8 years of DV…
  • 3.8
    Infinera – Sunnyvale, CA
    Est. Salary $119k-$180k
    8 days ago 8d
    levels of quality and performance. Experience with complex ASIC and board bring-up, boot code, RTOS BSP, device driver and embedded… best practices for the software engineering process, including documentation, modeling, design, development and QA. A track-record…
  • 3.6
    Lockheed Martin – Sunnyvale, CA
    Est. Salary $83k-$113k
    18 days ago 18d
    customers. - Lead a team of designers. Basic Qualifications - Experience in FPGA or ASIC design - HDL programming experience… successful candidate will have experience in the following ASIC and FPGA design activities with minimal level of oversight: - Draft…
  • 2.6
    SK Hynix Memory Solutions – San Jose, CA
    Est. Salary $91k-$118k
    21 days ago 21d
    Descriptions: The ASIC Design Engineer will be working on the leading edge SSD controller IP design from architecture to production… support physical design and system level analysis. Qualifications: BS, MS, or PhD in Electrical Engineering with 5-10 years…
  • 3.5
    QuickLogic – Sunnyvale, CA
    Est. Salary $109k-$144k
    4 days ago 4d
    simulator such as VERILOG Highly Desirable: ASIC design experience Product development experience CAD experience… Posted On06/22/2017 Senior Staff, Design Engineer Sunnyvale Salary Range : Worker Category…
  • 3.1
    OmniVision Technologies – Santa Clara, CA
    Est. Salary $103k-$137k
    18 days ago 18d
    digital ASIC IP for image/video processing. Support FPGA validation. Perform chip bring-up, validation, debug and test generation… Responsibilities: Design and Support DDR/LPDDR Controller design and next generation proprietary dram design. Design and verify digital…
  • 3.6
    Xilinx – San Jose, CA
    Est. Salary $117k-$147k
    4 days ago 4d
    FDST Verification group is looking for a Staff Design Verification Engineer to provide technical leadership, contribution… management is a plus. Strong understanding of different phases of ASIC and/or full custom chip development is required. Experience…
  • 3.8
    Infinera – Sunnyvale, CA
    Est. Salary $127k-$164k
    19 days ago 19d
    technology, sophisticated optics and world-class Coherent DSP ASICs. This position requires 6+ year’s FW development experience… Optical Engine used for Long Haul, Metro and Data Center Interconnects. Responsible for FW Requirement Documents, Design documents…
  • 3.1
    Omnivision Technologies, Inc – Santa Clara, CA
    13 days ago 13d
    low power circuit architecture design Collaborates and leads other ASIC architecture engineers for proof of concept and performance… Description Primary person responsible for defining and developing ASIC chip architecture for video and vision processing Integrates…
  • 3.2
    Toshiba America Business Solutions – San Jose, CA
    Est. Salary $65k-$91k
    6 days ago 6d
    Windows and Linux environments Other: 7+ years of SoC/ASIC verification experience Hands on experience using UVM SSD… Job Title: TAEC - Eng Design Sr Staff-110215 Requisition Number: 1592 Job Description Toshiba America…
  • 3.2
    Rambus – Sunnyvale, CA
    Est. Salary $147k-$188k
    5 days ago 5d
    collaborate with the industry, partnering with leading ASIC and SoC designers, foundries, IP developers, EDA companies and validation… Interact with technical leaders of the company and senior staff in engineering, marketing, and corporate development to help ensure…
  • 3.0
    Fujitsu – Sunnyvale, CA
    Est. Salary $99k-$138k
    21 days ago 21d
    Physical Design for ASIC using Socionext Advanced Standard Cell technology. The Staff Physical Design Engineer will have opportunities… are seeking a Staff Physical Design Engineer for our Sunnyvale, CA location. The Staff Physical Design Engineer will provide Physical…
  • Fujitsu Network Communications – Sunnyvale, CA
    21 days ago 21d
    Physical Design for ASIC using Socionext Advanced Standard Cell technology. The Staff Physical Design Engineer will have opportunities… are seeking a Staff Physical Design Engineer for our Sunnyvale, CA location. The Staff Physical Design Engineer will provide Physical…
  • 3.8
    Synaptics – San Jose, CA
    23 days ago 23d
    applicants to apply for a career opportunity as a Senior Staff ASIC Architect in our Platform Architecture department. This is… architectures for the next-generation of touch-sensing and fingerprint ASIC’s. A solid understanding of analog and digital circuitry is required…
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