Job Type
Date Posted
Salary Range
Distance

Principal ASIC/Layout Design Engineer Jobs in Phoenix, AZ

4Jobs

  • 3.6
    Microchip Technology – Chandler, AZ
    NEW
    RTL design, design verification, synthesis, STA, floor planning, and power analysis using an industry leading ASICdesign flow… product and test engineering, marketing, development systems, technology development, CAD, layout and other design organizations…
  • 3.6
    Microchip Technology – Chandler, AZ
    $74k-$98k(Glassdoor est.)
    8 days ago 8d
    the areas of RTL design, design verification, synthesis, STA, and Test using an industry leading ASICdesign flow. Candidate will… Work with design team to Synthesize design and release full chip netlist to layout Work with design/layout team to perform…
  • 3.6
    Microchip Technology – Chandler, AZ
    $73k-$95k(Glassdoor est.)
    5 days ago 5d
    RTL design, design verification, synthesis, STA, floor planning, and power analysis using an industry leading ASICdesign flow… product and test engineering, marketing, development systems, technology development, CAD, layout and other design organizations…
  • 3.6
    Microchip Technology – Chandler, AZ
    8 days ago 8d
    product and test engineering, marketing, development systems, technology development, CAD, layout and other design organizations… architecture, RTL design, synthesis, DFT compatibility, and power analysis of the IP based upon the ASICdesign flow. It will require…
Page 1 of 1
Unlock Your Free Employer Account