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ASIC Design Verification Engineer Jobs in Pune

9 Jobs

  • 3.7
    Marvell Technology – Pune
    We're Hiring
    equivalent degree and 13+ years of ASICDesign/Test/Verification experience with minimum 8 years of ASIC DFT experience. Additional… Requirements: Understanding of Design For Test methodologies and DFT verification experience (eg. scan, memory BIST, JTAG…
  • 3.7
    Marvell Technology – Pune
    We're Hiring
    Responsibilities: Contribute as an ASICVerificationEngineer developing the next generation of cloud, networking… processors. Work with Architects and Designers to develop complex verification environments, learning and using the latest…
  • 3.7
    Marvell Technology – Pune
    We're Hiring
    microprocessors. RTL design experience, Synthesis, static-timing closure, formal verification, gate-level simulations and… and block-level function verification. Design knowledge of one/more industry-standard bus interfaces (PCIe, SPI, SRIO, USB,…
  • MACOM – Pune
    New
    mentor other verificationengineers Requirements: Strong understanding of ASIC methodologies and tooling Strong understanding… Microcontroller based SOC verification experience Experience Level:10+ years of ASICverification experience. Prior experience…
  • 3.7
    Marvell Technology – Pune
    27 days ago 27d
    circuit (ASIC/Integrated Circuit). Interpreting architectural and design requirements; Writing verification test plans… As a Senior Engineer, candidate will be responsible for developing verification plans and architecting test benches…
  • 3.7
    Marvell Technology – Pune
    13 days ago 13d
    microprocessors. RTL design experience, Synthesis, static-timing closure, formal verification, gate-level simulations and… and block-level function verification. Design knowledge of one/more industry-standard bus interfaces (PCIe, SPI, SRIO, USB,…
  • Cadence Design Systems – Pune
    21 days ago 21d
    years of relevant experience in ASICdesign environment Should have knowledge of Physical Design Flow Conversant with Logic synthesis… Power Analysis and Formal Verification of Xtensa Processor and associated cores Develop Physical Design Collaterals for various…
  • 3.7
    Marvell Technology – Pune
    New
    circuit (ASIC/Integrated Circuit). Interpreting architectural and design requirements; Writing verification test plans… As a Staff Engineer, candidate will be responsible for developing verification plans and architecting test benches…
  • 3.7
    Marvell Technology – Pune
    New
    equivalent degree and 3+ years of ASICDesign/Test/Verification experience with minimum 2 years of ASIC DFT experience. Additional… Requirements: Understanding of Design For Test methodologies and DFT verification experience (eg. scan, memory BIST, JTAG…
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